Datasheet

LTC2977
64
2977fa
For more information www.linear.com/LTC2977
PMBus COMMAND DESCRIPTION
WATCHDOG OPERATION
A non zero write to the MFR_WATCHDOG_T register will reset the watchdog timer. Low-to-high transitions on the
WDI/RESETB pin also reset the watchdog timer. If the timer expires, ALERTB is asserted and the PWRGD output
is optionally deasserted and then reasserted after MFR_PWRGD_ASSERTION_DELAY ms. Writing 0 to either the
MFR_WATCH_DOG_T or MFR_WATCHDOG_T_FIRST registers will disable the timer.
MFR_WATCHDOG_T_FIRST and MFR_WATCHDOG_T
The MFR_WATCHDOG_T_FIRST register allows the user to program the duration of the first watchdog timer interval
following assertion of the PWRGD pin, assuming the PWRGD signal reflects the status of the watchdog timer. If
assertion of PWRGD is not conditioned by the watchdog timer’s status, then MFR_WATCHDOG_T_FIRST applies to
the first timing interval after the timer is enabled. Writing a value of 0ms to the MFR_WATCHDOG_T_FIRST register
disables the watchdog timer.
The MFR_WATCHDOG_T register allows the user to program watchdog time intervals subsequent to the MFR_
WATCHDOG_T_FIRST timing interval. Writing a value of 0ms to the MFR_WATCHDOG_T register disables the
watchdog timer
. A non-zero write to MFR_WATCHDOG_T will reset the watchdog timer.
The read value of both commands always returns what was last written and does not reflect internal limiting.
MFR_WATCHDOG_T_POR and MFR_WATCHDOG_T Data Contents
BIT(S) SYMBOL OPERATION
b[15:0] Mfr_watchdog_t_first
Mfr_watchdog_t
The data uses the L11 format.
These timers operate on an internal clock. The Mfr_watchdog_t timer will align to SHARE_CLK if it is running.
Delays are rounded to the nearest 10µs for _t and 1ms for _t_first.
Writing a zero value for Y to the Mfr_watchdog_t or Mfr_watchdog_t_first registers will disable the watchdog timer.
Units: ms. Max timeout is 0.6 sec for _t and 65 sec for _t_first