Datasheet
LTC2977
51
2977fa
For more information www.linear.com/LTC2977
MFR_PWRGD_EN
This command register controls the mapping of the watchdog and channel power good status to the PWRGD pin. Note
that odd numbered channels whose ADC is in high res mode do not contribute to power good.
MFR_PWRGD_EN Data Contents
BIT(S) SYMBOL OPERATION
b[15:9] Reserved Read only, always returns 0s.
b[8] Mfr_pwrgd_en_wdog Watchdog
1 = Watchdog timer not-expired status is ANDed with PWRGD status for any similarly enabled channels to
determine when the PWRGD pin gets asserted.
0 = Watchdog timer does not affect the PWRGD pin.
b[7] Mfr_pwrgd_en_chan7 Channel 7
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PWRGD status for this channel does not affect the PWRGD pin.
b[6] Mfr_pwrgd_en_chan6 Channel 6
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PWRGD status for this channel does not affect the PWRGD pin.
b[5] Mfr_pwrgd_en_chan5 Channel 5
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PWRGD status for this channel does not affect the PWRGD pin.
b[4] Mfr_pwrgd_en_chan4 Channel 4
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD
pin gets asserted.
0 = P
WRGD status for this channel does not affect the PWRGD pin.
b[3] Mfr_pwrgd_en_chan3 Channel 3
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PWRGD status for this channel does not affect the PWRGD pin.
b[2] Mfr_pwrgd_en_chan2 Channel 2
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PWRGD status for this channel does not affect the PWRGD pin.
b[1] Mfr_pwrgd_en_chan1 Channel 1
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PWRGD status for this channel does not affect the PWRGD pin.
b[0] Mfr_pwrgd_en_chan0 Channel 0
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PWRGD status for this channel does not affect the PWRGD pin.
PMBus
COMMAND DESCRIPTION