Datasheet

LTC4364-1/LTC4364-2
16
436412f
Then:
P
2
t =I
LOAD
2
1
3
t
r
b− a
( )
3
b
+
1
2
τ 2a
2
In
b
a
+ 3a
2
+ b
2
– 4ab














Typically V
REG
≈ V
IN
and τ >> t
r
simplifying the above to:
P
2
t =
1
2
I
LOAD
2
V
PK
− V
REG
( )
2
τ
For the transient conditions of V
PK
= 80V, V
IN
= 12V, V
REG
= 16V, t
r
= 10μs and τ = 1ms, and a load current of 3A,
P
2
t is 18.4W
2
s—easily handled by a MOSFET in a D-pak
package. The P
2
t of other transient waveshapes is evalu-
ated by integrating the square of MOSFET power versus
time. LTSpice™ can be used to simulate timer behavior
for more complex transients and cases where overvoltage
and overcurrent faults coexist.
Short-Circuit Stress
SOA stress of M1 must also be calculated for output short-
circuit conditions. Short-circuit P
2
t is given by:
P
2
t = V
IN
•
∆V
SNS
R
SNS






2
• t
OC
where ∆V
SNS
is the overcurrent fault threshold and t
OC
is
the overcurrent timer interval.
For V
IN
= 15V, OUT = 0V, ∆V
SNS
= 25mV, R
SNS
= 12mΩ
and C
TMR
= 100nF, P
2
t is 2.2W
2
s—less than the transient
SOA calculated in the previous example. Nevertheless,
to account for circuit tolerances this figure should be
doubled to 4.4W
2
s.
Limiting Inrush Current and HGATE Pin Compensation
The LTC4364 limits the inrush current to any load capaci-
tance by controlling the HGATE pin voltage slew rate. An
external capacitor, C
HG
, can be connected from HGATE
to ground to slow down the inrush current further at the
expense of slower turn-off time. The gate capacitor is set at:
C
HG
=
I
HGATE(UP)
I
INRUSH
• C
L
where I
HGATE(UP)
is the HGATE pin pull-up current, I
INRUSH
is the desired inrush current, C
L
is total load capacitance
at the output. In typical applications, a C
HG
of 6.8nF is
recommended for loop compensation during overvoltage
and overcurrent events. With input voltage steps faster
than 5V/μs, a larger gate capacitor helps prevent self
enhancement of the N-channel MOSFET.
The added gate capacitor slows down the turn-off time
during fault conditions and allows higher peak currents to
build up during an output short event. If this is a concern,
an extra resistor, R6, in series with C
HG
can restore the
turn-off time. A diode, D5, should be placed across R6
with the cathode connected to C
HG
as shown in Figure 1.
In a fast transient input step, D5 provides a bypass path to
C
HG
for the benefit of holding HGATE low and preventing
self enhancement.
Shutdown
The LTC4364 can be shut down to a low current mode
by pulling SHDN below 0.5V. The quiescent V
CC
current
drops to 10μA for both the LTC4364-1 and the LTC4364-2.
The SHDN pin can be pulled up to 100V or below GND by
up to 40V without damage. Leaving the pin open allows
an internal current source to pull it up to about 4V and
turn the part on. The leakage current at the pin should be
limited to no more than 1μA if no pull-up device is used
to help turn it on.
Supply Transient Protection
The LTC4364 is tested to operate to 80V and guaranteed
to be safe from damage between 100V and −40V. Voltage
transients above 100V or below −40V may cause permanent
damage. During a short-circuit condition, the large change
in current flowing through power supply traces coupled
with parasitic inductances from associated wiring can
cause destructive voltage transients in both positive and
negative directions at the V
CC
, SOURCE, and OUT pins. To
reduce the voltage transients, minimize the power trace
parasitic inductance by using short, wide traces. A small
RC filter (R4 and C1 in Figure 1) at the V
CC
pin filters high
voltage spikes of short pulse width.
APPLICATIONS INFORMATION