Datasheet

LTC4364-1/LTC4364-2
12
436412f
APPLICATIONS INFORMATION
An overcurrent fault occurs when the current limit circuitry
has been engaged for longer than the timeout delay set
by the timer capacitor. The HGATE pin is then immediately
pulled low by 130mA to the SOURCE pin, turning off the
MOSFET M1. After the fault condition has disappeared
and a cool down period has transpired, the HGATE pin
is allowed to pull back up and turn on the pass device
(LTC4364-2). The LTC4364-1 latches the HGATE pin low
after the overcurrent fault timeout and can be reset using
the SHDN or UV pin (see Resetting Faults).
Input Overvoltage Comparator
Input overvoltage is detected with the OV pin and an ex-
ternal resistive divider connected to the input (Figure 1).
At power-up, if the OV pin voltage is higher than its 1.25V
threshold before the 100μs internal power-on-reset expires,
or before the input undervoltage condition is cleared at
the UV pin, the HGATE pin will be held low until the OV
pin voltage drops below its threshold. To prevent start-up
in the event the board is hot swapped into an overvoltage
supply, separate resistive dividers with filtering capacitors
can be used for the OV and UV pins (Figure 2). The RC
constants should be skewed so that τ
UV
/τ
OV
> 50. In Fig-
ure2, If the board is plugged into a supply that is higher
than 60V, the LTC4364 will not turn on the pass devices
until the supply voltage drops below 60V.
Once the HGATE pin begins pulling high, an input overvolt-
age condition detected by OV will not turn off the pass
device. Instead, OV prevents the LTC4364 from restarting
following a fault (see Cool Down Period and Restart). This
prevents the pass device from cycling between ON and OFF
states when the input voltage stays at an elevated level for
a long period of time, reducing the stress on the MOSFET.
Input Undervoltage Comparator
The LTC4364 detects input undervoltage conditions such
as low battery using the UV pin. When the voltage at the
UV pin is below its 1.25V threshold, the HGATE pin pulls
low to keep the pass device off. Once the UV pin voltage
rises above the UV threshold plus the UV hysteresis (50mV
typical), the HGATE pin is allowed to pull up without go-
ing through a timer cycle. In Figure 1 and Figure 2, the
input UV threshold is set by the resistive dividers to 6V.
An undervoltage condition does not produce an output
at the F LT pin.
Fault Timer
The LTC4364 includes an adjustable fault timer. Con-
necting a capacitor from the TMR pin to ground sets the
delay period before the MOSFET M1 is turned off during
an overvoltage or overcurrent fault condition. The same
capacitor also sets the cool down period before M1 is
allowed to turn back on after the fault condition has
disappeared. Once a fault condition is detected, a current
source charges up the TMR pin. The current level varies
depending on the voltage drop across the V
CC
pin and the
OUT pin, corresponding to the MOSFET V
DS
. The on time
is inversely proportional to the voltage drop across the
MOSFET. This scheme therefore takes better advantage
of the available safe operating area (SOA) of the MOSFET
than would a fixed timer current.
The timer current starts at around 2μA with 0.5V or less
of V
CC
– V
OUT
, increasing linearly to 50μA with 75V of
V
CC
– V
OUT
during an overvoltage fault (Figure 3a):
I
TMR(UP)OV
= 2μA + 0.644[μA/V] • (V
CC
– V
OUT
– 0.5V)
During an overcurrent fault, the timer current starts at
10μA with 0.5V or less of V
CC
– V
OUT
and increases to
260μA with 75V of V
CC
– V
OUT
(Figure 3b):
I
TMR(UP)OC
= 10μA + 3.36[μA/V] • (V
CC
– V
OUT
– 0.5V)
This arrangement allows the pass device to turn off faster
during an overcurrent event, since more power is dissipated
under this condition. Refer to the Typical Performance
Characteristics section for the timer current at different
V
CC
– V
OUT
in both overvoltage and overcurrent events.
475k
V
IN
UV = 6V
0V = 60V
436412 F02
10k
383k
100k
τ
UV
= (383k||100k) • 10nF
τ
OV
= (475k||10k) •1nF
10nF
1nF
UV
LTC4364
OV
Figure 2. External UV and OV Configuration Blocks Start-Up Into
an Overvoltage Condition