Datasheet

LTC4228-1/LTC4228-2
15
422812f
IN2 are greater than 7V, the gate drive is guaranteed to be
greater than 10V. The gate drive is limited to not more than
14V. This allows the use of logic-level threshold N-channel
MOSFETs and standard N-channel MOSFETs above 7V. An
external Zener diode can be used to clamp the potential
from the MOSFET’s gate to source if the rated breakdown
voltage is less than 14V.
The maximum allowable drain-source voltage, BV
DSS
,
must be higher than the supply voltages as the full sup-
ply voltage can appear across the MOSFET. If an input or
output is connected to ground, the full supply voltage will
appear across the MOSFET. The R
DS(ON)
should be small
enough to conduct the maximum load current, and also
stay within the MOSFET ’s power rating.
CPO Capacitor Selection
The recommended value of the capacitor, C
CP
, between the
CPO and IN pins is approximately 10× the input capaci-
tance, C
ISS
, of the ideal diode MOSFET. A larger capacitor
takes a correspondingly longer time to charge up by the
internal charge pump. A smaller capacitor suffers more
voltage drop during a fast gate turn-on event as it shares
charge with the MOSFET gate capacitance.
Supply Transient Protection
When the capacitances at the input and output are very
small, rapid changes in current during input or output short-
circuit events can cause transients that exceed the 24V
absolute maximum ratings of the IN and OUT pins. To mini-
mize such spikes, use wider traces or heavier trace plating
to reduce the power trace inductance. Also, bypass locally
with a 10µF electrolytic and 0.1µF ceramic, or alternatively
clamp the input with a transient voltage suppressor (Z1, Z2).
A 10Ω, 0.1µF snubber damps the response and eliminates
ringing (See Figure 11).
Design Example
As a design example for selecting components, consider
a 12V system with a 7.6A maximum load current for the
two supplies (see Figure 1).
First, select the appropriate value of the current sense
resistors (R
S1
and R
S2
) for the 12V supply. Calculate
the sense resistor value based on the maximum load
current I
LOAD(MAX)
, the minimum circuit breaker trip cur-
rent I
TRIP(MIN)
and the lower limit for the circuit breaker
threshold ∆V
SENSE(CB)(MIN)
. A load current margin given
as a ratio of I
TRIP(MIN)
/I
LOAD(MAX)
is provided for allowing
backfeeding current to flow through the sense resistor
momentarily, without false tripping the circuit breaker on
the higher supply before the reverse turn-off is activated on
the lower supply. Assuming a load current margin of 1.5×,
I
TRIP(MIN)
= 1.5 • I
LOAD(MAX)
= 1.5 • 7.6A = 11.4A
R
S
=
∆V
SENSE(CB)(MIN)
I
TRIP(MIN)
=
47.5mV
11.4A
= 4.16mΩ
Choose a 4mΩ sense resistor with a 1% tolerance.
Next, calculate the R
DS(ON)
of the MOSFET to achieve
the desired forward drop at maximum load. Assuming
a forward drop, ∆V
FWD
of 60mV across the two external
MOSFETs:
R
DS(ON,TOTAL)
≤
∆V
FWD
I
LOAD(MAX)
=
60mV
7.6A
= 7.9mΩ
The Si7336ADP offers a good choice with a maximum
R
DS(ON)
of 3mΩ at V
GS
= 10V, thereby giving a total of
6mΩ for two MOSFETs in the supply path. The input ca-
pacitance, C
ISS
, of the Si7336ADP is about 5600pF. Slightly
exceeding the 10× recommendation, a 0.1µF capacitor is
selected for C
CP1
and C
CP2
at the CPO pins.
Next, verify that the thermal ratings of the selected MOS-
FET, Si7336ADP, are not exceeded during power-up or an
output short.
Assuming the MOSFET dissipates power due to inrush
current charging the load capacitor, C
L
, at power-up, the
energy dissipated in the MOSFET is the same as the energy
stored in the load capacitor, and is given by:
E
CL
=
1
2
• C
L
• V
IN
2
For C
L
= 1600µF, the time it takes to charge up C
L
is
calculated as:
t
CHARGE
=
C
L
• V
IN
I
INRUSH
=
1600µF • 12V
1A
= 19ms
applicaTions inForMaTion