Datasheet

LTM4624
3
4624fb
For more information www.linear.com/LTM4624
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4624 is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTM4624E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4624I is guaranteed to meet specifications over the
full –40°C to 125°C internal operating temperature range. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ΔV
OUT
(Line)/V
OUT
Line Regulation Accuracy V
OUT
= 1.5V, V
IN
= 4V to 14V, I
OUT
= 0A
l
0.04 0.15 %/V
ΔV
OUT
(Load)/V
OUT
Load Regulation Accuracy V
OUT
= 1.5V, I
OUT
= 0A to 4A
l
1 1.5 %
V
OUT(AC)
Output Ripple Voltage I
OUT
= 0A, C
OUT
= 100µF Ceramic, V
IN
= 12V,
V
OUT
= 1.5V
5 mV
ΔV
OUT(START)
Turn-On Overshoot I
OUT
= 0A, C
OUT
= 100µF Ceramic, V
IN
= 12V,
V
OUT
= 1.5V
30 mV
t
START
Turn-On Time C
OUT
= 100µF Ceramic, No Load, TRACK/SS = 0.01µF, V
IN
= 12V, V
OUT
= 1.5V
2.5 ms
ΔV
OUTLS
Peak Deviation for Dynamic
Load
Load: 0% to 50% to 0% of Full Load, C
OUT
= 47µF
Ceramic, V
IN
= 12V, V
OUT
= 1.5V
160 mV
t
SETTLE
Settling Time for Dynamic
Load Step
Load: 0% to 50% to 0% of Full Load, C
OUT
= 47µF
Ceramic, V
IN
= 12V, V
OUT
= 1.5V
40 µs
I
OUTPK
Output Current Limit V
IN
= 12V, V
OUT
= 1.5V 5 7 A
V
FB
Voltage at FB Pin I
OUT
= 0A, V
OUT
= 1.5V
I
OUT
= 0A, V
OUT
= 1.5V, –40°C to 125°C
l
0.594
0.591
0.60
0.60
0.606
0.609
V
V
I
FB
Current at FB Pin (Note 4) ±30 nA
R
FBHI
Resistor Between V
OUT
and
FB Pins
60.05 60.40 60.75 kΩ
I
TRACK/SS
Track Pin Soft-Start Pull-Up
Current
TRACK/SS = 0V 2.5 4 µA
V
IN(UVLO)
V
IN
Undervoltage Lockout V
IN
Falling
V
IN
Hysteresis
2.4 2.6
350
2.8 V
mV
t
ON(MIN)
Minimum On-Time (Note 4) 40 ns
t
OFF(MIN)
Minimum Off-Time (Note 4) 70 ns
V
PGOOD
PGOOD Trip Level V
FB
With Respect to Set Output
V
FB
Ramping Negative
V
FB
Ramping Positive
–13
7
–10
10
–7
13
%
%
I
PGOOD
PGOOD Leakage 2 µA
V
PGL
PGOOD Voltage Low I
PGOOD
= 1mA 0.02 0.1 V
V
INTVCC
Internal V
CC
Voltage SV
IN
= 4V to 14V 3.2 3.3 3.4 V
V
INTVCC
Load Reg INTV
CC
Load Regulation I
CC
= 0mA to 20mA 0.5 %
f
OSC
Oscillator Frequency 1 MHz
Note 3: See output current derating curves for different V
IN
, V
OUT
and T
A
.
Note 4: 100% tested at wafer level.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
The l denotes the specifications which apply over the full internal
operating temperature range (Note 2), otherwise specifications are at T
A
= 25°C. V
IN
= SV
IN
= 12V per the typical application shown on
the front page.