Datasheet

25
9009101114fa
LTM9011-14/
LTM9010-14/LTM9009-14
applicaTions inForMaTion
Encode Input
The signal quality of the encode inputs strongly affects
the A/D noise performance. The encode inputs should
be treated as analog signals—do not route them next to
digital traces on the circuit board. There are two modes
of operation for the encode inputs: the differential encode
mode (Figure 10), and the single-ended encode mode
(Figure 11).
The differential encode mode is recommended for sinu-
soidal, PECL, or LVDS encode inputs (Figures 12 and 13).
Figure 13. PECL or LVDS Encode Drive
Figure 12. Sinusoidal Encode Drive
50Ω
100Ω
0.1µF
0.1µF
0.1µF
T1
T1 = MA/COM ETC1-1-13
RESISTORS AND CAPACITORS
ARE 0402 PACKAGE SIZE
50Ω
LTM9011-14
9009101114 F12
ENC
ENC
+
ENC
+
ENC
PECL OR
LVDS
CLOCK
0.1µF
0.1µF
9009101114 F13
LTM9011-14
V
DD
LTM9011-14
9009101114 F10
ENC
ENC
+
15k
V
DD
DIFFERENTIAL
COMPARATOR
30k
Figure 10. Equivalent Encode Input Circuit
for Differential Encode Mode
30k
ENC
+
ENC
9009101114 F11
0V
1.8V TO
3.3V
LTM9011-14
CMOS LOGIC
BUFFER
Figure 11. Equivalent Encode Input Circuit for
Single-Ended Encode Mode
The encode inputs are internally biased to 1.2V through
10k equivalent resistance. The encode inputs can be taken
above V
DD
(up to 3.6V), and the common mode range is
from 1.1V to 1.6V. In the differential encode mode, ENC
should stay at least 200mV above ground to avoid falsely
triggering the single-ended encode mode. For good jitter
performance ENC
+
should have fast rise and fall times.
The single-ended encode mode should be used with CMOS
encode inputs. To select this mode, ENC
is connected
to ground and ENC
+
is driven with a square wave encode