Datasheet

21
9009101114fa
LTM9011-14/
LTM9010-14/LTM9009-14
FuncTional block DiagraM
Figure 1. Functional Block Diagram
DIFF
REF
AMP
REF
BUFFER
REFH REFL
RANGE
SELECT
1.25V
REFERENCE
GND
V
DD
/2
9009101114 F01
SENSE
V
REF
MODE
CONTROL
REGISTERS
OV
DD
= 1.8VV
DD
= 1.8V
OUT1A
+
OUT1A
–
OUT1B
+
OUT1B
–
S/H
CH 1
ANALOG
INPUT
14-BIT
ADC CORE
OUT2A
+
OUT2A
–
OUT2B
+
OUT2B
–
S/H
CH 2
ANALOG
INPUT
14-BIT
ADC CORE
OUT3A
+
OUT3A
–
OUT3B
+
OUT3B
–
S/H
CH 3
ANALOG
INPUT
14-BIT
ADC CORE
OUT4A
+
OUT4A
–
OUT4B
+
OUT4B
–
S/H
CH 4
ANALOG
INPUT
14-BIT
ADC CORE
OUT5A
+
OUT5A
–
OUT5B
+
OUT5B
–
S/H
CH 5
ANALOG
INPUT
14-BIT
ADC CORE
OUT6A
+
OUT6A
–
OUT6B
+
OUT6B
–
S/H
CH 6
ANALOG
INPUT
14-BIT
ADC CORE
OUT7A
+
OUT7A
–
OUT7B
+
OUT7B
–
S/H
CH 7
ANALOG
INPUT
14-BIT
ADC CORE
OUT8A
+
OUT8A
–
OUT8B
+
OUT8B
–
S/H
CH 8
ANALOG
INPUT
14-BIT
ADC CORE
DCOA±
DCOB±
FRA±
FRB±
ENC
+
ENC
–
SDOA
SDOB
SDI
SCK
CSA
CSB
PAR/SER
VCM12 VCM34 VCM56 VCM78
PLL
DATA
SERIALIZER