Datasheet

5
dc1840afa
DEMO MANUAL DC1840A
Demonstration circuit 1682a operation
Board Layout
Proper board layout is crucial for proper LTC4270/LTC4271
chipset operation, robustness, and accuracy. When lay-
ing out, pay attention to parts placement, Kelvin sensing,
power paths, and copper fill. It is imperative to follow the
LTC4270/LTC4271 Layout Guide document when laying
out the board.
Figure 6. DC1682A Digital and Analog Isolation
Isolation and Power Supplies
The LTC4270/LTC4271 chipset provides communication
across an isolation barrier through a data transformer
(Figure 6). This eliminates the need for expensive opto-
couplers. All digital pins reside on the digital ground refer-
ence and are isolated from the analog PoE supply. A 3.3V
supply for V
DD
and an isolated V
EE
supply are connected
to the DC1682A through the 34-pin connector.
V
DD33
V
DD33
T1
DND
CPD
CND
DPD
AGND
V
EE
DNA
V
EE
V
EE
ISOLATION
WÜRTH 7490100143
CPA
34-PIN
CONNECTOR
DC1682A SIDE DC1680A SIDE
V
DD33
SUPPLY
V
EE
SUPPLY
CNA
DPA
TX
+
RX
–
CT(4)
CT(2)
RX
+
TX
–
TD
+
RD
–
CT(3)
CT
RD
+
TD
–
U1
LTC4271
U2
LTC4270
C23
1µF
C21
0.1µF
R13
100Ω
DC1840A F06
DGND
C19
1µF
100V
D1
SMAJ58A
R14
100Ω
C22
1µF
R15
100Ω
R16
100Ω
R21
100Ω
R22
100Ω
R23
100Ω
R24
100Ω
C24, 2nF
2kV
+
–
+
–