Datasheet

LTC4274A/LTC4274C
16
4274acfc
OPERATION
Figure 10. Power over Ethernet System Diagram
LTC4274 Product Family
The LTC4274 is a third-generation single PSE controller
that implements four PSE ports in either an end-point
or midspan design. Virtually all necessary circuitry is
included to implement an IEEE 802.3at compliant PSE
design, requiring only an external power MOSFET and
sense resistor; these minimize power loss compared to
alternative designs with an on-board MOSFET.
The LTC4274 comes in three grades which support dif-
ferent PD power levels.
The A-grade LTC4274 extends PoE power delivery capabili-
ties to LTPoE
++
levels. LTPoE
++
is a Linear Technology
proprietary specification allowing for the delivery of up to
90W to LTPoE
++
compliant PDs. The LTPoE
++
architecture
extends the IEEE physical power negotiation to include
38.7W, 52.7W, 70W and 90W power levels. The A-grade
LTC4274 also incorporates all B- and C-grade features.
The B-grade LTC4274 is a fully IEEE-compliant Type 2
PSE supporting autonomous detection, classification
and powering of Type 1 and Type 2 PDs. The B-grade
LTC4274 also incorporates all C-grade features. The
B-grade LTC4274 is marketed and numbered without the
B suffix for legacy reasons; the absence of power grade
suffix infers a B-grade part.
The C-grade LTC4274 is a fully autonomous 802.3at Type 1
PSE solution. Intended for use only in AUTO pin mode,
the C-grade chipset autonomously supports detection,
classification and powering of Type 1 PDs. As a Type 1
PSE, 2-event classification is prohibited and Class 4 PDs
are automatically treated as Class 0 PDs.
PoE Basics
Common Ethernet data connections consist of two or four
twisted pairs of copper wire (commonly known as CAT-5
cable), transformer-coupled at each end to avoid ground
loops. PoE systems take advantage of this coupling ar-
rangement by applying voltage between the center-taps
of the data transformers to transmit power from the PSE
to the PD without affecting data transmission. Figure 10
shows a high-level PoE system schematic.
To avoid damaging legacy data equipment that does not
expect to see DC voltage, the PoE spec defines a protocol
that determines when the PSE may apply and remove
power. Valid PDs are required to have a specific 25k
common-mode resistance at their input. When such a PD
is connected to the cable, the PSE detects this signature
resistance and turns on the power. When the PD is later
disconnected, the PSE senses the open circuit and turns
power off. The PSE also turns off power in the event of a
current fault or short-circuit.
4274AC F10
S1B
S1B
SMAJ58A
58V
0.22µF
100V
X7R
1µF
100V
X7R
Tx
Rx
Rx
Tx
SMAJ58A
58V
DATA PAIR
DATA PAIR
V
EE
SENSE GATE OUT
V
DD
INT
SCL
SDAIN
SDAOUT
0.25
SPARE PAIR
SPARE PAIR
LTC4274A/
LTC4274C
DGND AGND
I
2
C
3.3V
INTERRUPT
–54V
CAT 5
RJ45
4
5
4
5
1
2
1
2
3
6
3
6
7
8
7
8
RJ45
1N4002
=4
1N4002
=4
PSE PD
R
CLASS
V
IN
PWRGD
V
OUT
LTC4265
GND
DC/DC
CONVERTER
5µF ≤ C
IN
≤ 300µF
+
–
V
OUT
GND
0.1µF
100V