Datasheet
LTC6957-1/LTC6957-2/
LTC6957-3/LTC6957-4
27
6957f
For more information www.linear.com/LTC6957-1
LVDS Outputs of the LTC6957-2
Figure 10 shows a simplified schematic of the LTC6957-2
LVDS output stage. The TIA/EIA-644-A standard specifies
the generator electrical requirements for this type of in-
terface, and the LTC6957-2 has been verified against that
standard using the following test methods:
SPECIFICATION LEVEL OF TESTING
4.1.1 100% Production Tested
4.1.2 100% Production Tested
4.1.3 100% Production Tested
4.1.4 100% Production Tested*
4.1.5 Lab Verification of Design Only
6a 100% Production Tested
6b 100% Production Tested
6c 100% Production Tested
*The t
RISE
/t
FALL
of the LTC6957-2 are not compliant with the standard so
as to preserve full phase noise performance. To slow the edge rates, add
differential capacitance across the outputs. 2.7pF is sufficient to meet the
standard.
The TIA/EIA-644-A standard does not cover driver charac-
teristics during shutdown nor the transitions to and from
shutdown. The LTC6957-2 outputs are not guaranteed to
comply with the standard for any length of time after the
rising edge of SD1/SD2, nor for any time before sufficient
t
WAKEUP
/t
ENABLE
subsequent to the falling edge of SD1/
SD2. The output common mode voltage (V
OS
in 644-A
parlance) could have a slow settling time compared to the
signal frequency, and a long string of runt pulses could
be seen. The LTC6957-2 shutdown capability should be
used as a slow, power-saving on/off control, not a logic
gating/enable control.
Power Supplies for LVDS Operation
The LTC6957-2 has a single supply that should be within
the 3.15V to 3.45V range.
The LTC6957-2 power supply voltage can corrupt the
spectral purity of the clock signal, though to a lesser
degree than with any of the other options. See the Typical
Performance Characteristic chart t
PD
vs Supply Voltage.
When using both LVDS channels, the LTC6957-2 power
consumption can exceed 120mW, which results in a
junction-to-ambient rise of 17.4°C in the MS-12 package,
more when operated at 3.45V. Again, it is up to the user
to always avoid junction temperatures above the Absolute
Maximum rating, and to stay comfortably below it for any
extended periods of time.
applicaTions inForMaTion
Figure 10. LTC6957-2 LVDS Outputs
LTC6957-2
6957 F10
110Ω
PCB ROUTING TRACES
Z0 = 50Ω TO 60Ω
–
+
V
+
3.7mA
V
+
650Ω
650Ω
1.25V