Datasheet

LTM4613
4
4613f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4613 is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTM4613E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4613I is guaranteed to meet specifications over the
–40°C to 125°C internal operating temperature range. The LTM4613MP
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Control Section
V
FB
Voltage at V
FB
Pin I
OUT
= 0A, V
OUT
= 12V
l
0.591 0.6 0.609 V
V
RUN
RUN Pin On/Off Threshold 1 1.5 1.9 V
I
SS / TRACK
Soft-Start Charging Current V
SS/TRACK
= 0V –1 –1.5 –2 µA
V
FCB
Forced Continuous Threshold 0.57 0.6 0.63 V
I
FCB
Forced Continuous Pin Current V
FCB
= 0V –1 –2 µA
t
ON(MIN)
Minimum On-Time (Note 3) 50 100 ns
t
OFF(MIN)
Minimum Off-Time (Note 3) 250 400 ns
R
PLLIN
PLLIN Input Resistor 50
I
DRVCC
Current into DRV
CC
Pin V
OUT
= 12V, I
OUT
= 0A, DRV
CC
= 5V 22 30 mA
R
FBHI
Resistor Between V
OUT
and V
FB
Pins
99.5 100 100.5
V
MPGM
Margin Reference Voltage 1.18 V
V
MARG0
,
V
MARG1
MARG0, MARG1 Voltage
Thresholds
1.4 V
PGOOD
∆V
FBH
PGOOD Upper Threshold V
FB
Rising 7 10 13 %
∆V
FBL
PGOOD Lower Threshold V
FB
Falling –7 –10 –13 %
∆V
FB(HYS)
PGOOD Hysteresis V
FB
Returning 1.5 %
V
PGL
PGOOD Low Voltage I
PGOOD
= 5mA 0.2 0.4 V
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at T
A
= 25°C (Note 2), V
IN
= 24V, unless otherwise noted. Per Typical
Application (front page) configuration.
is guaranteed and tested over the full –55°C to 125°C internal operating
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 3: 100% tested at die level only.
Note 4: See the Output Current Derating curves for different V
IN
, V
OUT
and T
A
.
Note 5: Guaranteed by design.