Datasheet
5
dc1724af
DEMO MANUAL DC1724A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
schematic Diagram
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
5.6V-36V
OPTIONAL CIRCUIT
1210
IHLP-2525CZ-01
VIN
GND
VOUT
5V @ 600mA
GND
BIAS
PGOOD
(600KHz)
0805
1206
NOTE: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS ARE 0603.
ALL CAPACITORS ARE 0603.
ON
OFF
IN
VIN
IN
VOUT
VOUT
VIN
TECHNOLOGY
Thursday, November 17, 2011
TECHNOLOGY
Thursday, November 17, 2011
TECHNOLOGY
Thursday, November 17, 2011
R6
221K
R6
221K
R7
0
1206
R7
0
1206
R1
OPT
R1
OPT
L1
10uH
L1
10uH
E2E2
+
C7
10uF
50V
+
C7
10uF
50V
E4E4
C4
(OPT)
C4
(OPT)
R2
0
R2
0
R3
OPT
R3
OPT
E5E5
C5
0.01uF
50V
C5
0.01uF
50V
C3
22uF
6.3V
C3
22uF
6.3V
C2
1.0uF
50V
C2
1.0uF
50V
JP1JP1
1
2
3
E3E3
E6E6
C6
10uF
50V
C6
10uF
50V
FB1
Bead
FB1
Bead
R4
316K
R4
316K
E1E1
R5
100K
R5
100K
U1
LTM8029EY
U1
LTM8029EY
VIN
A4
VIN
A5
VIN
B4
VIN
B5
ADJ
A2
RUN
A1
RT
B1
PGOOD
B2
GND
C1
GND
C2
GND
D1
GND
D2
GND
D3
GND
D4
GND
D5
GND
E1
GND
E2
GND
E3
GND
E4
GND
E5
GND
F1
GND
F2
GND
G1
GND
G2
GND
H1
GND
H2
VOUT
F3
VOUT
F4
VOUT
F5
VOUT
G3
VOUT
G4
VOUT
G5
VOUT
H4
VOUT
H5
BIAS
H3
+
C1
10uF
50V
+
C1
10uF
50V