Datasheet

LTC2758
7
2758fa
For more information www.linear.com/LTC2758
TYPICAL PERFORMANCE CHARACTERISTICS
Settling Full-Scale Step
INL vs V
DD
DNL vs V
DD
Logic Threshold
vs Supply Voltage
Supply Current
vs Logic Input Voltage
Supply Current
vs Update Frequency
Mid-Scale Glitch (V
DD
= 3V)
V
DD
= 5V, V(R
INX
) = 5V, T
A
= 25°C, unless otherwise noted.
Mid-Scale Glitch (V
DD
= 5V)
Multiplying Frequency Response
vs Digital Code
V
DD
(V)
2.5 3.5 4
–1.0
INL (LSB)
–0.8
–0.6
–0.2
–0.4
0.4
0.2
0
0.6
0.8
1.0
54.5 5.5
2758 G10
3
+INL
–INL
0V TO 10V RANGE
V
DD
(V)
2.5 3.5 4
–1.0
DNL (LSB)
–0.8
–0.6
–0.2
–0.4
0.4
0.2
0
0.6
0.8
1.0
54.5 5.5
2758 G11
3
+DNL
–DNL
0V TO 10V RANGE
ALL BITS ON
ALL BITS OFF
FREQUENCY (Hz)
100 1k 10k
–140
ATTENUATION (dB)
–100
–120
–60
–80
–40
–20
0
1M100k 10M
2758 G12
0V TO 5V OUTPUT RANGE
LT1468 OUTPUT AMPLIFIER
C
FEEDBACK
= 15pF
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
500ns/DIV
CS/LD
5V/DIV
GATED
SETTLING
WAVEFORM
100µV/DIV
(AVERAGED)
2758 G13
LT1468 AMP; C
FEEDBACK
= 20pF
0V TO 10V STEP
V
REF
= –10V; SPAN CODE = 0000
t
SETTLE
= 1.8µs to 0.0004% (18 BITS)
DIGITAL INPUT VOLTAGE (V)
0
SUPPLY CURRENT (mA)
3
4
5
4
2758 G16
2
1
0
1
2
3
5
V
DD
= 5V
CLR, LDAC, SDI, SCK,
CS/LD TIED TOGETHER
V
DD
= 3V
V
DD
(V)
2.5
0.5
LOGIC THRESHOLD (V)
0.75
1
1.25
1.5
2
3
3.5 4 4.5
5 5.5
1.75
2758 G17
RISING
FALLING
SCK FREQUENCY (Hz)
1
0.0001
SUPPLY CURRENT (mA)
0.001
0.01
0.1
1
10
100
V
DD
= 5V
100 10k 1M 100M
2758 G18
V
DD
= 3V
ALTERNATING ZERO-SCALE
AND FULL-SCALE
500ns/DIV
CS/LD
5V/DIV
V
OUT
5mV/DIV
(AVERAGED)
2758 G14
0V TO 5V RANGE
LT1468 OUTPUT AMPLIFIER
C
FEEDBACK
= 50pF
RISING MAJOR CARRY TRANSITION.
FALLING TRANSITION IS SIMILAR OR BETTER.
0.4nV•s TYP
500ns/DIV
CS/LD
5V/DIV
V
OUT
5mV/DIV
(AVERAGED)
2758 G15
0V TO 5V RANGE
LT1468 OUTPUT AMPLIFIER
C
FEEDBACK
= 50pF
RISING MAJOR CARRY TRANSITION.
FALLING TRANSITION IS SIMILAR OR BETTER.
2nV•s TYP