Datasheet

LTC2758
10
2758fa
For more information www.linear.com/LTC2758
BLOCK DIAGRAM
TIMING DIAGRAM
SDI
SRO
Hi-Z
CS/LD
SCK
LSB
2758 TD
LSB
t
2
t
9
t
8
t
5
t
7
1 2 31 32
t
6
t
1
LDAC
t
3
t
4
t
11
18
3
CODE REGISTERS
SPAN REGISTERS
31,32
33
34
35,36
37,38
39,40
41
28
42
R
OFSB
REFB
R
INB
SROSCKSDIS2S1S0M-SPAN
CS/LD LDACCLRRFLAG
GE
ADJB
R
COMB
I
OUT1B
29
I
OUT2BS
I
OUT2BF
V
OSADJB
R
FBB
26131211192025242322
18
3
CODE REGISTERS
SPAN REGISTERS
DAC REG
DAC REG
5,6
4
3
1,2
47,48
45,46
44
8
9
43
R
OFSA
REFA
R
INA
GE
ADJA
R
COMA
I
OUT1A
I
OUT2AS
I
OUT2AF
V
OSADJA
R
FBA
DAC A
18-BIT WITH
SPAN SELECT
GND
7, 10, 15, 17,
18, 27, 30
14
V
DD
16
INPUT REG
INPUT REG
INPUT REG
INPUT REG
DAC REG
DAC REG
DAC B
18-BIT WITH
SPAN SELECT
CONTROL AND READBACK LOGIC
2758 BD
LTC2758
2.56M
2.56M
20k
20k
20k
20k
POWER-ON
RESET