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LTC2758

2758fa

For more information www.linear.com/LTC2758

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

Dual Serial 18-Bit

SoftSpan I

OUT

DACs

The LTC

2758 is a dual 18-bit multiplying serial-input,

current-output digital-to-analog converter. LTC2758A

provides full 18-bit performance (INL and DNL of ±1LSB

maximum) over temperature without any adjustments.

18-bit monotonicity is guaranteed in all performance

grades. This SoftSpan™ DAC operates from a single 3V

to 5V supply and offers six output ranges (up to ±10V)

that can be programmed through the 3-wire SPI serial

interface or pin-strapped for operation in a single range.

Any on-chip register (including DAC output-range set-

tings) can be read for veriﬁcation in just one instruction

cycle; and if you change register content, the altered

instruction cycle.

Voltage-controlled offset and gain adjustments are also

provided; and the power-on reset circuit and CLR pin both

reset the DAC outputs to 0V regardless of output range.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property

of their respective owners.

Dual 18-Bit V

OUT

DAC with Software-Selectable Ranges

Maximum 18-Bit INL Error: ±1 LSB Over Temperature

Program or Pin-Strap

Six Output Ranges:

0V to 5V, 0V to 10V, –2.5V to 7.5V, ±2.5V, ±5V, ±10V

Guaranteed Monotonic Over Temperature

Glitch Impulse 0.4nV•s (3V), 2nV•s (5V)

18-Bit Settling Time: 2.1µs

2.7V to 5.5V Single Supply Operation

1µA Maximum Supply Current

Voltage-Controlled Offset and Gain Trims

Serial Interface with Readback of All Registers

Clear and Power-On-Reset to 0V Regardless of

Output Range

48-Pin 7mm × 7mm LQFP Package

Instrumentation

Medical Devices

Automatic Test Equipment

Process Control and Industrial Automation

LTC2758 Integral Nonlinearity

CODE

0 65536

–1.0

INL (LSB)

–0.8

–0.6

–0.4

–0.2

0.6

0.4

0.2

0.8

1.0

131072 196608 262143

2758 TA01b

0V TO 10V RANGE

LTC2758

SPI WITH

READBACK

GND

–

DAC B

DAC A

REFERENCE

OUTA

OUTB

INA

REFA

REFERENCE

REFB

OFSA

ADJA

ADJB

OFSB

COMB

COMA

INB

OSADJA

OSADJB

OUT1A

OUT2A

OUT1B

OUT2B

FBA

FBB

–

2758 TA01a

LT1012

LT1468

0.1µF

OFFSET A ADJUST

OFFSET B ADJUST

GAIN A

ADJUST

GAIN B

ADJUST

27pF

Summary of content (24 pages)

PAGE 1
LTC2758 Dual Serial 18-Bit SoftSpan IOUT DACs FEATURES n n n n n n n n n n n DESCRIPTION Maximum 18-Bit INL Error: ±1 LSB Over Temperature Program or Pin-Strap Six Output Ranges: 0V to 5V, 0V to 10V, –2.5V to 7.5V, ±2.5V, ±5V, ±10V Guaranteed Monotonic Over Temperature Glitch Impulse 0.4nV • s (3V), 2nV • s (5V) 18-Bit Settling Time: 2.1µs 2.7V to 5.
PAGE 2
LTC2758 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) 48 47 46 45 44 43 42 41 40 39 38 37 ROFSA ROFSA RFBA RFBA IOUT1A VOSADJA VOSADJB IOUT1B RFBB RFBB ROFSB ROFSB TOP VIEW REF A 1 REF A 2 RCOMA 3 GEADJA 4 RINA 5 RINA 6 GND 7 IOUT2AS 8 IOUT2AF 9 GND 10 CS/LD 11 SDI 12 36 35 34 33 32 31 30 29 28 27 26 25 REF B REF B RCOMB GEADJB RINB RINB GND IOUT2BS IOUT2BF GND LDAC S2 SCK 13 SRO 14 GND 15 VDD 16 GND 17 GND 18 CLR 19 RFLAG 20 DNC 21 M-SPAN 22 S0 23 S1 24 IOUT1X , IOUT2X to GND...........
PAGE 3
LTC2758 ELECTRICAL CHARACTERISTICS VDD = 5V, V(RINX) = 5V unless otherwise specified. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN LTC2758B TYP MAX MIN LTC2758A TYP MAX UNITS Static Performance Resolution l 18 18 18 Bits 18 Bits Monotonicity l DNL Differential Nonlinearity l ±1 ±0.2 ±1 LSB INL Integral Nonlinearity l ±2 ±0.
PAGE 4
LTC2758 ELECTRICAL CHARACTERISTICS VDD = 5V, V(RINX) = 5V unless otherwise specified. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply VDD Supply Voltage IDD VDD Supply Current Digital Inputs = 0V or VDD l VIH Digital Input High Voltage 3.3V ≤ VDD ≤ 5.5V 2.7V ≤ VDD < 3.3V l l VIL Digital Input Low Voltage 4.5V < VDD ≤ 5.5V 2.7V ≤ VDD ≤ 4.
PAGE 5
LTC2758 TIMING CHARACTERISTICS otherwise specifications are at TA = 25°C.
PAGE 6
LTC2758 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 5V, V(RINX) = 5V, TA = 25°C, unless otherwise noted. Integral Nonlinearity (INL) 1.0 0V TO 10V RANGE 0.8 0.8 0.6 0.6 0.4 0.4 0.4 0.2 0.2 0.2 0 –0.2 INL (LSB) 0.6 0 –0.2 0 –0.2 –0.4 –0.4 –0.4 –0.6 –0.6 –0.6 –0.8 –0.8 –0.8 –1.0 –1.0 –1.0 65536 131072 CODE 196608 262143 0 65536 131072 CODE 196608 2758 G02 INL vs Temperature 0.8 DNL vs Temperature 1.0 0V TO 10V RANGE 0.6 0.8 DNL (LSB) 0 –INL 0 –0.6 –0.6 –0.8 –0.
PAGE 7
LTC2758 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 5V, V(RINX) = 5V, TA = 25°C, unless otherwise noted. INL vs VDD 1.0 1.0 0V TO 10V RANGE 0.8 0.8 +INL –20 0.4 DNL (LSB) 0.2 0 –INL –0.2 0.2 +DNL 0 –0.2 –DNL –0.4 –0.4 –0.6 –0.6 –0.8 –0.8 –1.0 2.5 –1.0 2.5 3 3.5 4 4.5 VDD (V) 5 5.5 ATTENUATION (dB) 0.4 ALL BITS ON D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0V TO 10V RANGE 0.6 0.
PAGE 8
LTC2758 PIN FUNCTIONS REFA (Pins 1, 2): Feedback Resistor for the DAC A Reference Inverting Amplifier, and Reference Input for DAC A. The 20k feedback resistor is connected internally from REFA to RCOMA. For normal operation tie this pin to the output of the DAC A reference inverting amplifier (see Typical Application). Typically –5V; accepts up to ±15V. Pins 1 and 2 are internally shorted together. RCOMA (Pin 3): Virtual Ground Point for the DAC A Reference Amplifier Inverting Resistors.
PAGE 9
LTC2758 PIN FUNCTIONS S2 (Pin 25): Span Bit 2 Input. In Manual Span mode (MSPAN tied to VDD), Pins S0, S1 and S2 are pin-strapped to select a single fixed output range for all DACs. These pins should be tied to either GND or VDD even if they are unused. LDAC (Pin 26): Asynchronous DAC Load Input. When LDAC is a logic low, all DACs are updated (CS/LD must be high). IOUT2BF, IOUT2BS (Pins 28, 29): DAC B Current Output Complement Force and Sense Pins. Tie to ground via a clean, low-impedance path.
PAGE 10
LTC2758 BLOCK DIAGRAM 16 VDD 31,32 RINB 5,6 RINA 4 3 2.56M GEADJA RCOMA 2.
PAGE 11
LTC2758 OPERATION Output Ranges VDD The LTC2758 is a dual, current-output, serial-input precision multiplying DAC with selectable output ranges. Ranges can either be programmed in software for maximum flexibility (each of the DACs can be programmed to any one of six output ranges) or hardwired through pin-strapping. Two unipolar ranges are available (0V to 5V and 0V to 10V), and four bipolar ranges (±2.5V, ±5V, ±10V and –2.5V to 7.5V).
PAGE 12
LTC2758 OPERATION Serial Interface When the CS/LD pin is taken low, the data on the SDI pin is loaded into the shift register on the rising edge of the clock (SCK pin). The loading sequence required for the LTC2758 is one byte consisting of a 4-bit command word (C3 C2 C1 C0) and a 4-bit address word (A3 A2 A1 A0), then three bytes (24 bits) of data. When writing a code, the code data is left (MSB) justified; so that the 24-bit data field consists of 18 code bits followed by 6 don’t-care bits.
PAGE 13
LTC2758 OPERATION Table 1.
PAGE 14
LTC2758 OPERATION Examples 1. Load DAC A with 0V to 10V range, output at zero volts; and DAC B with ±10V range, output at zero volts. Note the DAC outputs should change at the same time. a) CS/LD↓. Clock SDI: 00101111 00000000 00000011 00000000 b) CS/LD↑ Span Input register- Range of DACs set to bipolar ±10V. c) CS/LD↓. Clock SDI: 00100000 00000000 00000001 00000000 d) CS/LD↑ Span Input register- Range of DAC A set to unipolar 0V to 10V. e) CS/LD↓.
PAGE 15
LTC2758 OPERATION System Offset and Reference Adjustments Many systems require compensation for overall system offset. This may be an order of magnitude or more greater than the offset of the LTC2758, which is so low as to be dominated by external output amplifier errors even when using the most precise op amps. The offset adjust pins VOSADJX can be used to null unipolar offset or bipolar zero error.
PAGE 16
SRO SDI SRO C3 SDI 0 0 0 C1 3 C1 0 0 0 COMMAND C2 READBACK SPAN Hi-Z WRITE SPAN C3 2 COMMAND C2 READBACK CODE Hi-Z WRITE CODE 1 SCK CS/LD 0 C0 0 C0 4 0 A3 0 A3 5 A1 A1 0 0 0 ADDRESS A2 0 ADDRESS A2 6 7 0 A0 0 A0 8 0 X D17 D17 9 0 X D16 D16 10 0 X 0 X D14 D14 12 0 X D13 D13 X D12 D12 14 X D11 D11 15 0 0 12 DON’T-CARE 13 0 X D10 D10 D9 17 D8 18 0 X D9 0 X D8 19 D7 0 X D7 18-BIT DAC CODE 16 0 X D6
PAGE 17
LTC2758 OPERATION SDI WRITE CODE DAC A WRITE CODE DAC B WRITE SPAN DAC A WRITE SPAN DAC B UPDATE ALL DACs ... SRO ... READ CODE INPUT REGISTER DAC A READ CODE INPUT REGISTER DAC B READ SPAN INPUT REGISTER DAC A READ SPAN INPUT REGISTER DAC B READ CODE DAC REGISTER DAC A 2758 F03 Figure 3. Rolling Readback 2758fa For more information www.linear.
PAGE 18
LTC2758 APPLICATIONS INFORMATION Op Amp Selection Table 4. Coefficients for the Equations of Table 5 Because of the extremely high accuracy of the 18-bit LTC2758, careful thought should be given to op amp selection in order to achieve the exceptional performance of which the part is capable. Fortunately, the sensitivity of INL and DNL to op amp offset has been greatly reduced compared to previous generations of multiplying DACs.
PAGE 19
LTC2758 APPLICATIONS INFORMATION Op amp offset contributes mostly to DAC output offset and gain error, and has minimal effect on INL and DNL. For example, consider the LTC2758 in unipolar 5V output range. (Note that for this example, the LSB size is 19µV.) An op amp offset of 35µV will cause 1.8LSB of output offset, and 1.8LSB of gain error; but 0.4LSB of INL, and just 0.1LSB of DNL.
PAGE 20
LTC2758 APPLICATIONS INFORMATION Table 7. Partial List of LTC Precision References Recommended for Use with the LTC2758 with Relevant Specifications INITIAL TOLERANCE TEMPERATURE DRIFT 0.1Hz to 10Hz NOISE LT1019A-5, LT1019A-10 ±0.05% max 5ppm/°C max 12µVP-P LT1236A-5, LT1236A-10 ±0.05% max 5ppm/°C max 3µVP-P LT1460A-5, LT1460A-10 ±0.075% max 10ppm/°C max 20µVP-P LT1790A-2.5 ±0.05% max 10ppm/°C max 12µVP-P LTC6652A-5 ±0.05% max 5ppm/°C max 2.8ppmP-P LTC6655A-2.5 LTC6655A-5 ±0.
PAGE 21
LTC2758 APPLICATIONS INFORMATION ALTERNATE AMPLIFIER FOR OPTIMUM SETTLING TIME PERFORMANCE IOUT2AS 8 6 1 + 2 IOUT2AF 1000pF LT1468 ZETEX BAT54S 200Ω 200Ω 2 9 3 6 LT1012 + 9 – IOUT2AF 8 – IOUT2AS 1 2 3 ZETEX* BAT54S 3 2 3 *SCHOTTKY BARRIER DIODE VREF 5V 47, 48 ROFSA RFBA 45, 46 5, 6 RINA + 4 LT1012 – 6 3 15pF GEADJA DAC A 3 RCOMA 2 IOUT1A 44 2 – IOUT2A 8, 9 3 + LT1468 6 VOUTA VOSADJA 43 150pF 1, 2 REFA – + DAC B LTC2758 2758 F05 Figure 4.
PAGE 22
LTC2758 PACKAGE DESCRIPTION LX Package 48-Lead Plastic LQFP (7mm × 7mm) (Reference LTC DWG # 05-08-1760 Rev Ø) 7.15 – 7.25 9.00 BSC 5.50 REF 7.00 BSC 48 0.50 BSC 1 2 48 SEE NOTE: 4 1 2 9.00 BSC 5.50 REF 7.00 BSC 7.15 – 7.25 0.20 – 0.30 A A PACKAGE OUTLINE C0.30 – 0.50 1.30 MIN RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 1.60 1.35 – 1.45 MAX 11 – 13 R0.08 – 0.20 GAUGE PLANE 0.25 0–7 11 – 13 0.09 – 0.20 1.00 REF 0.50 BSC 0.17 – 0.27 0.05 – 0.
PAGE 23
LTC2758 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 09/13 Fixed RCOMA (Pin 3) description 8 Updated Typical Application 24 2758fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.
PAGE 24
LTC2758 TYPICAL APPLICATION Composite Amplifier Circuit Achieves Both Fast Settling and 18-Bit Precision with No Adjustments 12V IN OUT LTC6655-5 0.1µF 15V 10µF + – LT1012 –15V 47, 48 5, 6 ROFSA 37, 38 RINA ROFSB 34 31, 32 RCOMB RINB 3 RCOMA 16 V DD 10k 10k 26 LDAC 19 43 4 42 33 22 25 24 23 100pF 1, 2, 35, 36 REFA, REFB 45, 46 RFBA 44 1k IOUT1A VOUTA 10k 10k CLR 1µF IOUT2A 8, 9 – + 1µF VOSADJA 5V 5V LTC2054 1k –5V – + 100pF LTC6240 –5V 10Ω 15V + – 5pF LTC1360 –15V 4.