Datasheet
LTC4359
9
4359fa
For more information www.linear.com/LTC4359
Figure 3a. SHDN Control
Figure 3b. Transistor SHDN Control
Figure 3c. Opto-Isolator SHDN Control
Input Short-Circuit Faults
The dynamic behavior of an active, ideal diode entering
reverse bias is most accurately characterized by a delay
followed by a period of reverse recovery. During the delay
phase some reverse current is built up, limited by parasitic
resistances and inductances. During the reverse recovery
phase, energy stored in the parasitic inductances is trans-
ferred to other elements in the circuit. Current slew rates
during reverse recovery may reach 100A/µs or higher.
High slew rates coupled with parasitic inductances in
series with the input and output paths may cause poten-
tially destructive transients to appear at the IN, SOURCE
and OUT pins of the LTC4359 during reverse recovery.
A zero impedance short-circuit directly across the input
and ground is especially troublesome because it permits
the highest possible reverse current to build up during
the delay phase. When the MOSFET finally interrupts the
reverse current, the LTC4359 IN and SOURCE pins experi-
ence a negative voltage spike, while the OUT pin spikes in
the positive direction.
To prevent damage to the LTC4359 under conditions
of input short-circuit, protect the IN, SOURCE and OUT
pins as shown in Figure 4 . The IN and SOURCE pins are
protected by clamping to the V
SS
pin with two TransZorbs
or TVS. For input voltages 24V and greater, D4 is needed
to protect the MOSFET’s gate oxide during input short-
circuit conditions. Negative spikes, seen after the MOSFET
turns off during an input short, are clamped by D2, a 24V
TVS. D2 allows reverse inputs to 24V while keeping the
MOSFET off and is not required if reverse-input protection
APPLICATIONS INFORMATION
Figure 4. Reverse Recovery Produces Inductive Spikes at the IN, SOURCE and OUT Pins.
The Polarity of Step Recovery Is Shown Across Parasitic Inductances
4359 F04
LTC4359
V
SS
SHDN
IN SOURCE OUT
R1
1k
GATE
Q1
FDMS86101
REVERSE RECOVERY CURRENT
INPUT PARASITIC
INDUCTANCE
+ –
D4
DDZ9699T
12V
V
IN
V
OUT
C
OUT
≥1.5µF
C
LOAD
INPUT
SHORT
OUTPUT PARASITIC
INDUCTANCE
+ –
D1
SMAT70A
70V
D2
SMAJ24A
24V
4359 F03a
LTC4359
1kVN2222LL
V
SS
SHDN
OFFON
4359 F03b
LTC4359
1k
240k
100k
100k240k
48V
2N5551
V
SS
SHDN
IN
ON
OFF
2N5401
4359 F03c
LTC4359
1k
2MΩ
1MΩ
MOC
207M
2k
48V
V
SS
SHDN
IN
OFFON