Datasheet

LTM4628
16
4628fe
For more information www.linear.com/LTM4628
APPLICATIONS INFORMATION
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK pins. The output can be tracked up
and down with another regulator. The master regulator’s
output is divided down with an external resistor divider
that is the same as the slave regulator’s feedback divider
to implement coincident tracking. The LTM4628 uses an
accurate 60.4k resistor internally for the top feedback
resistor for each channel. Figure 6 shows an example of
coincident tracking. Equations:
V
OUT _ SLAVE
= 1+
60.4k
R
TA






• V
TRACK
V
TRACK
is the track ramp applied to the slave’s track pin.
V
TRACK
has a control range of 0V to 0.6V, or the internal
reference voltage. When the master’s output is divided
down with the same resistor values used to set the slave’s
output, then the slave will coincident track with the master
until it reaches its final value. The master will continue to
its final value from the slave’s regulation point. Voltage
tracking is disabled when V
TRACK
is more than 0.6V. R
TA
in Figure 6 will be equal to the R
FB
for coincident tracking.
Figure 7 shows the coincident tracking waveforms.
The TRACK pin of the master can be controlled by a capaci
-
tor placed on the master regulator TRACK pin to ground.
A
1.3µA current source will charge the TRACK pin up to
the reference voltage and then proceed up to INTV
CC
. After
the 0.6V ramp, the TRACK pin will no longer be in con-
trol, and
the internal voltage reference will control output
regulation
from the feedback divider. Foldback current
limit is disabled during this sequence of turn-on during
tracking or soft-starting. The TRACK pins are pulled
low
Figure 7. Output Coincident Tracking Waveform
Figure 6. Example of Output Tracking Application Circuit
TIME
MASTER OUTPUT
SLAVE OUTPUT
OUTPUT VOLTAGE
4628 F07
4628 F06
LTM4628
V
IN
TEMP
RUN1
RUN2
TRACK1
TRACK2
f
SET
C8
470µF
6.3V
R
FB
60.4k
R2
10k
C6
100µF
6.3V
PHASMD
V
OUT1
V
OUTS1
SW1
V
FB1
V
FB2
COMP1
COMP2
V
OUTS2
V
OUT2
SW2
PGOOD2
MODE_PLLIN CLKOUT INTV
CC
EXTV
CC
PGOOD1
PGOOD
INTV
CC
SGND GND
1.5V
MASTER
DIFFP DIFFN DIFFOUT
40.2k
PGOOD
SLAVE
1.2V AT 8A
1.5V AT 8A
C7
470µF
6.3V
C4
100µF
6.3V
R4
100k
R
TB
60.4k
R1
10k
D1
5.1V ZENER
5V TO 16V INTERMEDIATE BUS
R6
120k
C
SS
0.1µF
C1
22µF
25V
R
TA
60.4k
C2
22µF
25V
C3
22µF
25V
C10
4.7µF
R9
10k
INTV
CC
RAMP TIME
t
SOFTSTART
= (C
SS
/1.3µA) • 0.6V