Datasheet

LTC4226
21
4226f
applicaTions inForMaTion
Figure 14. Dual Continuous 89A Typical Output
Z1
SM8S15AHE3/2D
FTMR1
GND
C
T1
1nF
+12V
R
S1
0.5mΩ
Q1
IRF1324S-7PPBF
R
S2
0.5mΩ
Q2
IRF1324S-7PPBF
*OPTIONAL
CONNECTION OPTION TO SHARE MOSFET SOA
C
T2
1nF
FTMR2
ON1
V
CC1
SENSE1 GATE1
LTC4226-2
OUT1
V
CC2
SENSE2 GATE2 OUT2
FAULT1
CLS
FAULT2
ON2
ON1
FAULT1
FAULT2
ON2
OUTPUT1
12V, 89A
OUTPUT2
12V, 89A
4226 F14
R4
10k
R3
10k
C1
1000µF
×2
25V
+
R
G1
10Ω
C2
22µF
×20
25V
X5R
C3
1000µF
×2
25V
+
C4
22µF
×20
25V
X5R
C
G1
10nF
R
G2
10Ω
R2*
10Ω
R1*
10Ω
C
G2
10nF
One drawback of the separate FTMR scheme for parallel
channels is that one timer may ramp up in current limit
mode before the other channel, resulting in shorter circuit
breaker timer duration and/or a reduction in the combined
circuit breaker current threshold due to R
DS(ON)
mismatch.
These issues are solved by using two cross-coupled PNP
clamps connected between the FTMR pins as shown in Fig-
ure 15. The FAULT pins are shorted together and connected
to an external open drain pull-down which is controlled by
a gate synchronization signal. The PNPs prevent a current
limited channel’s FTMR from ramping up too fast while
the other channel is still in circuit breaker mode. If only
one of the channels is in current limit mode, the clamp
from the other channel will slow down the current limited
channel’s FTMR ramp rate as shown in Figure 15’s accom-
panying waveforms. This scheme assumes common V
CC
and ON pins, and both channels should be on the same
chip. Channel to channel matching is 6% for V
CB
, 6%
for V
LIMIT
, and GATE high skew delay timing for both ON
and V
CC
are 10%. The GATE pins must be synchronized
by asserting the F
AULT inputs low to mask out t
ON(UVL)
skew. Asserting the FAULT pins low for at least 100ms at
power-up will ensure that the MOSFETs turn on together.
C
T2
10nF
LTC4226
FAULT2
FAULT
FTMR2
DELAYED
C
T1
10nF
FAULT1FTMR1
Q3
2N3906
Q4
2N3906
4226 F15
1ms/DIV
FTMR
0.5V/DIV
FAULT
5V/DIV
I
OUT
5A/DIV
FTMR1
FAULT
FTMR2
TOTAL OUTPUT CURRENT
ONOFF
Figure 15. PNP Connected FTMR for 2 Parallel Channels