Datasheet

LTM8033
18
8033fa
For more information www.linear.com/LTM8033
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confu-
sion and inconsistency. These definitions are given in
JESD 51-12, and are quoted or paraphrased in the fol-
lowing:
•
θ
JA
is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect
an actual application or viable operating condition.
• θ
JCBOTTOM
is the junction-to-board thermal resistance
with all of the component power dissipation flowing
through the bottom of the package. In the typical
µModule, the bulk of the heat flows out the bottom of
the package, but there is always heat flow out into the
ambient environment. As a result, this thermal resistance
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
• θ
JCTOP
is determined with nearly all of the component
power dissipation flowing through the top of the pack-
age. As the electrical connections of the typical µModule
are on the bottom of the package, it is rare for an ap-
plication to operate such that most of the heat flows
from the junction to the top of the part. As in the case
of θ
JCBOTTOM
, this value may be useful for comparing
packages but the test conditions don’t generally match
the user’s application.
• θ
JB
is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule and into the board, and is really the sum of
the θ
JCBOTTOM
and the thermal resistance of the bottom
of the part through the solder joints and through a por-
tion of the board. The board temperature is measured a
specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
The most appropriate way to use the coefficients is when
running a detailed thermal analysis, such as FEA, which
considers all of the thermal resistances simultaneously
.
None of them can be individually used to accurately pre
-
dict the thermal per
formance of the product, so it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature
versus load graphs
given in the LTM8033 data sheet.
A graphical representation of these thermal resistances
is given in Figure 5.
The blue resistances are contained within the µModule,
and the green are outside.
The die temperature of the LTM8033 must be lower than
the maximum rating of 125°C, so care should be taken
in the layout of the circuit to ensure good heat sinking
of the LTM8033. The bulk of the heat flow out of the
LTM8033 is through the bottom of the module and the LGA
pads into the printed circuit board. Consequently a poor
printed circuit board design can cause excessive heating,
resulting in impaired performance or reliability. Please
refer to the PCB Layout section for printed circuit board
APPLICATIONS INFORMATION
8033 F05
µMODULE REGULATOR
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
JUNCTION A
t
CASE (BOTTOM)-TO-BOARD
RESISTANCE
Figure 5