Datasheet

LTM8062/LTM8062A
8
8062fd
For more information www.linear.com/LTM8062
block DiagraM
8062 BD
V
INA
8.2µH
SENSE
RESISTOR
10µF (LTM8062)
2.2µF (LTM8062A)
0.1µF
0.1µF
RUN
V
INREG
ADJ
TMR
NTC
BIAS
ADJ
GND FAULT CHRG
V
IN
BAT
CURRENT
MODE
BATTERY
MANAGEMENT
CONTROLLER
INTERNAL
COMPENSATION
100k
pin FuncTions
A 0.68μF capacitor is often used, which generates a timer
EOC at three hours, and a precondition limit time of 22.5
minutes. If a timer-based termination is not desired, the
timer function can be disabled by connecting the TMR
pin to ground. With the timer function disabled, charging
terminates when the charge current drops below a C/10
rate, approximately 200mA.
V
INREG
(Pin L6): Input Voltage Regulation Reference. The
maximum charge current is reduced when this pin is below
2.7V. There is a 100k resistor to GND. Connecting a resis
-
tor from V
IN
to this pin sets the minimum operational V
IN
voltage. This is typically used to program the peak power
voltage for a solar panel. The LTM8062/LTM8062A servo
the maximum charge current required to maintain the
programmed operational V
IN
voltage, through maintain-
ing the voltage on V
INREG
at or above 2.7V. If the voltage
regulation feature is not used, connect the pin to V
IN
.
RUN (Pin K6): Precision Threshold Enable Input Pin. The
RUN threshold is 1.25V (rising), with 120mV of input hys
-
teresis. When in shutdown mode, all charging functions are
disabled. The precision threshold allows use of the RUN
pin to incorporate UVLO functions. If the RUN pin is pulled
below 0.4V, the IC enters a low current shutdown mode
where the V
IN
pin current is reduced to 15μA. Typical RUN
pin input bias current is 10nA. If the shutdown function is
not desired, connect the pin to the V
IN
pin.