Datasheet

LTM8062/LTM8062A
11
8062fd
For more information www.linear.com/LTM8062
applicaTions inForMaTion
V
IN
Input Supply
The LTM8062/LTM8062A are biased directly from the
charger input supply through the V
IN
pin. This pin pro-
vides large switched currents, so a high quality low ESR
decoupling capacitor is recommended to minimize volt
-
age glitches on V
IN
. 4.7μF is typically adequate for most
charger applications.
Reverse Protection Diode
The LTM8062/LTM8062A integrate a high voltage power
Schottky diode to provide input reverse voltage protec
-
tion. The anode of this diode is connected to V
INA
, and
the cathode is connected to V
IN
. There is a small amount
of capacitance at each end; please see the Block Diagram.
The integrated diode can also be used to block battery
discharge leakage paths. The LTM8062/LTM8062A switch
and drive circuitry are designed to stand off some reverse
voltage from BAT to V
IN
, but leakage paths exist that can
put a small load on the battery if V
IN
falls below BAT.
Specifically, the RUN pin has a small bias current and
there is a 100k resistor tied to V
INREG
to GND. If either
of these pins is connected to V
IN
when it is below BAT,
it can present a small but finite discharge current to the
battery. This discharge current may be blocked by the
integrated Schottky diode if the RUN and V
INREG
circuits
are tied to V
INA
.
Input Supply Voltage Regulation
The LTM8062/LTM8062A contain a voltage monitor pin
that enables programming a minimum operational volt
-
age. There is a 1% 100k resistor from V
INREG
to GND.
Connecting a resistor from V
IN
to the V
INREG
pin enables
programming of minimum input supply voltage, typically
used to program the peak power voltage for a solar panel.
Maximum charge current is reduced when the V
INREG
pin
is below the regulation threshold of 2.7V.
If the V
INREG
function is not used, and if the input supply
cannot provide enough power to satisfy the requirements
of an LTM8062/LTM8062A charger, the input supply voltage
For most applications, the design process is straight
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input voltage range and battery float voltage.
2. Apply the recommended C
IN
and R
ADJ
values.
3. Connect BIAS as indicated.
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions. Bear in mind that the
maximum output current is limited by junction tempera
-
ture, the relationship between the input and output voltage
magnitude and polarity and other factors. Please refer to
the graphs in the Typical Performance Characteristics
section for guidance.
Table 1. Recommended Component Values and Configuration
(T
A
= 25°C)
V
IN
RANGE (V)* V
BAT
(V) C
IN
R
ADJ1
TOP
(kΩ)
R
ADJ2
BOTTOM
(kΩ)
6 to 32 3.6 4.7µF 1206 X7R 50V 274 2870
6 to 32 4.1 4.7µF 1206 X7R 50V 312 1260
6 to 32 4.2 4.7µF 1206 X7R 50V 320 1150
6.25 to 32 4.7 4.7µF 1206 X7R 50V 357 835
9.5 to 32 7.05 4.7µF 1206 X7R 50V 530 464
9.75 to 32 7.2 4.7µF 1206 X7R 50V 549 459
11 to 32 8.2 4.7µF 1206 X7R 50V 626 417
11.5 to 32 8.4 4.7µF 1206 X7R 50V 642 412
12.75 to 32 9.4 4.7µF 1206 X7R 50V 715 383
16.5 to 32 12.3 4.7µF 1206 X7R 50V 942 344
17 to 32 12.6 4.7µF 1206 X7R 50V 965 340
18.25 to 32 13.5 4.7µF 1206 X7R 50V 1020 328
19 to 32 14.08 4.7µF 1206 X7R 50V 1090 332
19.5 to 32 14.42 4.7µF 1206 X7R 50V 1110 328
23 to 32 16.4 4.7µF 1206 X7R 50V 1240 312
23.5 to 32 16.8 4.7µF 1206 X7R 50V 1270 309
26 to 32 18.8 4.7µF 1206 X7R 50V 1420 301
*Operating range, V
IN
must be 3.3V above V
BAT
to start. Input bulk
capacitance is required.