Datasheet

17
21421012fa
LTC2142-12/
LTC2141-12/LTC2140-12
Full Rate CMOS Output Mode Timing
All Outputs Are Single-Ended and Have CMOS Levels
TIMING DIAGRAMS
t
H
t
D
t
C
t
L
B – 6 B – 5 B – 4 B – 3 B – 2
t
AP
A + 1
A + 2
A + 4
A + 3
A
CH 1
ANALOG
INPUT
ENC
–
ENC
+
CLKOUT
+
CLKOUT
–
D2_0 - D2_11, OF2
t
AP
B + 1
B + 2
B + 4
B + 3
B
CH 2
ANALOG
INPUT
A – 6 A – 5 A – 4 A – 3 A – 2
D1_0 - D1_11, OF1
21421012 TD01