Datasheet

LTC2145-12/
LTC2144-12/LTC2143-12
16
21454312fa
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
D1_0_1
–
/D1_0_1
+
to D1_10_11
–
/D1_10_11
+
(Pins 47/48,
49/50, 51/52, 53/54, 55/56, 57/58): Channel 1 Double
Data Rate Digital Outputs. Two data bits are multiplexed
onto each differential output pair. The even data bits (D0,
D2, D4, D6, D8, D10) appear when CLKOUT
+
is low. The
odd data bits (D1, D3, D5, D7, D9, D11) appear when
CLKOUT
+
is high.
OF2_1
–
/OF2_1
+
(Pins 59/60): Over/Underflow Digital
Output. OF2_1
+
is high when an overflow or underflow
has occurred. The over/under flow for both channels
are multiplexed onto this pin. Channel 2 appears when
CLKOUT
+
is low, and Channel 1 appears when CLKOUT
+
is high.
DIFF
REF
AMP
REF
BUF
2.2µF
0.1µF 0.1µF
INTERNAL CLOCK SIGNALSREFH REFL
CLOCK/DUTY
CYCLE
CONTROL
RANGE
SELECT
1.25V
REFERENCE
ENC
+
REFH REFL
ENC
–
CORRECTION
LOGIC
SDOCS
OGND
OF1
OV
DD
D1_11
CLKOUT
–
CLKOUT
+
D1_0
21454312 F01
SENSE
V
REF
CH 1
ANALOG
INPUT
2.2µF
V
CM1
0.1µF
V
DD
/2
OUTPUT
DRIVERS
MODE
CONTROL
REGISTERS
SCKPAR/SER SDI
t
t
t
GND
S/H
12-BIT
ADC CORE
CH 2
ANALOG
INPUT
S/H
12-BIT
ADC CORE
V
CM2
0.1µF
OF2
D2_11
D2_0
t
t
t
V
DD
PIN FUNCTIONS