Datasheet

LTM8031
7
8031fb
pin FuncTions
SYNC (Pin L6): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode
®
operation
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin floating. Tie to a clock source for synchroniza-
tion. Clock edges should have rise and fall times faster
than 1µs. See Synchronization section in Applications
Information.
PGOOD (Pin K7): The PGOOD pin is the open-collector
output of an internal comparator. PGOOD remains low until
the ADJ pin is within 10% of the final regulation voltage.
The PGOOD output is valid when V
IN
is above 3.6V and
RUN/SS is high. If this function is not used, leave this
pin floating.
ADJ (Pin J7): The LTM8031 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
value of R
ADJ
is given by the equation:
R
ADJ
=
196.71
V
OUT
– 0.79
where R
ADJ
is in kΩ.
block DiagraM
CURRENT
MODE
CONTROLLER
249k
10µF
V
OUT
AUX
GND
4.7µH
BIAS
22pF
EMI FILTER
FIN
V
IN
GND
SHARE
SYNC
RT PGOOD ADJ
8031 BD
RUN/SS