Datasheet

LTC4070
3
4070fc
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4070 is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTC4070E is guaranteed to meet performance specifications
for junction temperatures from 0°C to 85°C. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The l denotes the specifications which apply over the full operating
junction temperature range. V
NTC
= V
CC
, T
A
= 25°C unless otherwise specified. Current into a pin is positive and current out of a pin is
negative. All voltages are referenced to GND unless otherwise noted. (Note 2)
The LTC4070I is guaranteed over the full –40°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 3: The I
DRV(SNK)
current is tested by pulling the DRV pin up to V
CC
through a 475k resistor, R
DRV
. Pulling the DRV pin up to V
CC
with low
impedance disables the regulator.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
High Battery Status
V
HBTH
HBO Threshold (V
FLOAT
– V
CC
) V
CC
Rising
l
15 40 60 mV
V
HBHY
Hysteresis 100 mV
Low Battery Status
V
LBTH
LBO Threshold V
CC
Falling
l
3.08 3.2 3.34 V
V
LBHY
Hysteresis 220 290 350 mV
Status Outputs HBO/LBO
V
OL
CMOS Output Low I
SINK
= 1mA, V
CC
= 3.7V
l
0.5 V
V
OH
CMOS Output High V
LBO
: V
CC
= 3.1V, I
SOURCE
= –100µA
V
HBO
: I
CC
= 1.5mA, I
SOURCE
= –500µA
l
V
CC
– 0.6 V
3-State Selection Input: ADJ
V
ADJ
ADJ Input Level Input Logic Low Level
l
0.3 V
Input Logic High Level
l
V
CC
– 0.3 V
I
ADJ(Z)
Allowable ADJ Leakage Current in
Floating State
l
±3 µA
NTC
I
NTC
NTC Leakage Current 0V< NTC < V
CC
–50 0 50 nA
I
NTCBIAS
Average NTCBIAS Sink Current Pulsed Duty Cycle < 0.002% 30 pA
∆V
FLOAT(NTC)
Delta Float Voltage per NTC Comparator
Step
I
CC
= 1mA, NTC Falling Below One of the
NTC
TH
Thresholds
ADJ = 0V
ADJ = Float
ADJ = V
CC
–50
–75
–100
mV
mV
mV
NTC
TH1
NTC Comparator Falling Thresholds V
NTC
as % of V
NTCBIAS
Amplitude 35.5 36.5 37.5 %
NTC
TH2
28.0 29.0 30.0 %
NTC
TH3
21.8 22.8 23.8 %
NTC
TH4
16.8 17.8 18.8 %
NTC
HY
Hysteresis 30 mV
Drive Output
I
DRV(SOURCE)
DRV Output Source Current V
CC
= 3.1V, V
DRV
= 0V –1 mA
I
DRV(SINK)
DRV Output Sink Current I
CC
= 1mA, R
DRV
= 475k (Note 3) 3 µA