Datasheet

LTC4070
10
4070fc
applicaTions inForMaTion
The voltage at the NTC pin depends on the ratio of the NTC
thermistor value, R
NTC
, and a bias resistor, R
NOM
. Choose
R
NOM
equal to the value of the thermistor at 25°C. R
NOM
is 10k for a Vishay NTHS0402N02N1002F thermistor with
a B
25/85
value of 3490. R
NOM
must be connected from
NTCBIAS to NTC. The ratio of the NTC pin voltage to the
NTCBIAS voltage is:
R
NTC
R
NTC
+ R
NOM
( )
When the thermistor temperature rises, the resistance
drops; and the resistor divider between R
NOM
and the
thermistor lowers the voltage at the NTC pin.
An NTC thermistor with higher B
25/85
values may also
be used with the LTC4070. However the temperature trip
points are shifted due to the higher negative temperature
coefficient of the thermistor. To correct for this difference
add a resistor, R
FIX
, in series with the higher B
25/85
value
thermistor to shift the ratio,
R
FIX
+
R
NTC
R
FIX
+ R
NTC
+ R
NOM
( )
up to the internal resistive divider tap points: NTC
TH1
through NTC
TH4
. For a 100k thermistor with a B
25/85
value
of 3950 NTHS0402N01N1003F, at 70°C (with R
NOM
=
100k) choose R
FIX
= 3.92kΩ. The temperature trip points
are found by looking up the thermistor R/T values plus
R
FIX
that correspond to the ratios for NTC
TH1
= 36.5%,
NTC
TH2
= 29.0%, NTC
TH3
= 22.8%, and NTC
TH4
= 17.8%.
Selecting R
FIX
= 3.92k results in trip points of 39.9°C,
49.4°C, 59.2°C and 69.6°C.
Another technique may be used without adding an
additional component. Instead decrease R
NOM
to adjust
the NTC
TH
thresholds for a given R/T thermistor profile. For
example, if R
NOM
= 88.7k (with the same 100k thermistor)
then the temperature trip points are 41.0°C, 49.8°C, 58.5°C,
and 67.3°C.
When using the NTC features of the LTC4070 it is important
to keep in mind that the maximum shunt current increases
as the float voltage, V
FLOAT_EFF
drops with NTC conditioning.
Reviewing the Typical Application with a 12V wall adapter
in Figure 1; the input resistor, R
IN
, should be increased
to 165Ω such that the maximum shunt current does not
exceed 50mA at the lowest possible float voltage due to
NTC conditioning, V
FLOAT_MIN
= 3.8V.
Thermal Considerations
At maximum shunt current, the LTC4070 may dissipate up
to 205mW. The thermal dissipation of the package should
be taken into account when operating at maximum shunt
current so as not to exceed the absolute maximum junc-
tion temperature of the device. With q
JA
of 40°C/W, in the
MSOP package, at maximum shunt current of 50mA the
junction temperature rise is about 8°C above ambient.
With q
JA
of 76°C/W in the DFN package, at maximum
shunt current of 50mA the junction temperature rise is
about 16°C above ambient.
Operation with an External PFET to Boost Shunt Current
Table 2 lists recommended devices to increase the
maximum shunt current. Due to the requirement for low
capacitance on the DRV pin node, it is recommended that
only low gate charge and high threshold PFET devices be
used. Also it is recommended that careful PCB layout be
used to keep leakage at the DRV pin to a minimum as the
I
DRV(SINK)
current is typically 3µA.
Refer to device manufacturers data sheets for maximum
continuous power dissipation and thermal resistance when
selecting an external PFET for a particular application.
Table 2. Recommended External Shunt PFETS
DEVICE VENDOR Q
GS
V
TH(MIN)
R
DS(ON)
FDN352AP Fairchild 0.50nC –0.8V 0.33
Si3467DV Vishay 1.7nC –1.0V 0.073
Si3469DV Vishay 3.8nC –1.0V 0.041
DMP2130LDM Diodes Inc. 2.0nC –0.6V 0.094
DMP3015LSS Diodes Inc. 7.2nC –1.0V 0.014