Datasheet

LTC2383-16
10
238316f
OVERVIEW
The LTC2383-16 is a low noise, low power, high speed 16-bit
successive approximation register (SAR) ADC. Operating
from a single 2.5V supply, the LTC2383-16 supports a
large ±2.5V fully differential input range, making it ideal
for high performance applications which require a wide
dynamic range. The LTC2383-16 achieves ±2LSB INL max,
no missing codes at 16-bits and 92dB SNR.
Fast 1Msps throughput with no cycle latency makes the
LTC2383-16 ideally suited for a wide variety of high speed
applications. An internal oscillator sets the conversion time,
easing external timing considerations. The LTC2383-16
dissipates only 13mW at 1Msps, while an auto power-down
feature is provided to further reduce power dissipation
during inactive periods.
CONVERTER OPERATION
The LTC2383-16 operates in two phases. During the
acquisition phase, the charge redistribution capacitor D/A
converter (CDAC) is connected to the IN
+
and IN
–
pins
to sample the differential analog input voltage. A rising
edge on the CNV pin initiates a conversion. During the
conversion phase, the 16-bit CDAC is sequenced through a
successive approximation algorithm, effectively comparing
the sampled input with binary-weighted fractions of the
reference voltage (e.g. V
REF
/2, V
REF
/4 … V
REF
/65536) using
the differential comparator. At the end of conversion, the
CDAC output approximates the sampled analog input. The
ADC control logic then prepares the 16-bit digital output
code for serial transfer.
TRANSFER FUNCTION
The LTC2383-16 digitizes the full-scale voltage of 2 × REF
into 2
16
levels, resulting in an LSB size of 76µV with
REF = 2.5V. The ideal transfer function is shown in Figure 2.
The output data is in 2’s complement format.
ANALOG INPUT
The analog inputs of the LTC2383-16 are fully differential
in order to maximize the signal swing that can be digitized.
The analog inputs can be modeled by the equivalent
APPLICATIONS INFORMATION
Figure 2. LTC2383-16 Transfer Function
INPUT VOLTAGE (V)
0V
OUTPUT CODE (TWO’S COMPLEMENT)
–1
LSB
238316 F02
011...111
011...110
000...001
000...000
100...000
100...001
111...110
1
LSB
BIPOLAR
ZERO
111...111
FSR/2 – 1LSB–FSR/2
FSR = +FS – –FS
1LSB = FSR/65536
circuit shown in Figure 3. The diodes at the input provide
ESD protection. In the acquisition phase, each input sees
approximately 45pF (C
IN
) from the sampling CDAC in series
with 40Ω (R
ON
) from the on-resistance of the sampling
switch. Any unwanted signal that is common to both
inputs will be reduced by the common mode rejection of
the ADC. The inputs draw a current spike while charging
the C
IN
capacitors during acquisition. During conversion,
the analog inputs draw only a small leakage current.
R
ON
C
IN
R
ON
REF
REF
C
IN
IN
+
IN
–
BIAS
VOLTAGE
238316 F03
Figure 3. The Equivalent Circuit for the
Differential Analog Input of the LTC2383-16
INPUT DRIVE CIRCUITS
A low impedance source can directly drive the high
impedance inputs of the LTC2383-16 without gain error.
A high impedance source should be buffered to minimize
settling time during acquisition and to optimize the
distortion performance of the ADC. Minimizing settling