Datasheet

LTC4278
34
4278fc
design evaluates the switcher for short-circuit protection
and adds any additional circuitry to prevent destruction.
Output Voltage Error Sources
The LTC4278’s feedback sensing introduces additional
minor sources of errors. The following is a summary list:
• The internal bandgap voltage reference sets the reference
voltage for the feedback amplifier. The specifications
detail its variation.
• The external feedback resistive divider ratio directly
affects regulated voltage. Use 1% components.
• Leakage inductance on the transformer secondary
reduces the effective secondary-to-feedback winding
turns ratio (NS/NF) from its ideal value. This increases
the output voltage target by a similar percentage. Since
secondary leakage inductance is constant from part to
part (within a tolerance) adjust the feedback resistor
ratio to compensate.
• The transformer secondary current flows through the
impedances of the winding resistance, synchronous
MOSFET R
DS(ON)
and output capacitor ESR. The DC
equivalent current for these errors is higher than the
load current because conduction occurs only during
the converter’s off-time. So, divide the load current by
(1 – DC).
If the output load current is relatively constant, the feedback
resistive divider is used to compensate for these losses.
Otherwise, use the LTC4278 load compensation circuitry
(see Load Compensation). If multiple output windings are
used, the flyback winding will have a signal that represents
an amalgamation of all these windings impedances. Take
care that you examine worst-case loading conditions when
tweaking the voltages.
Power MOSFET Selection
The power MOSFETs are selected primarily on the criteria of
on-resistance R
DS(ON)
, input capacitance, drain-to-source
breakdown voltage (BV
DSS
), maximum gate voltage (V
GS
)
and maximum drain current (ID
(MAX)
).
For the primary-side power MOSFET, the peak current is:
I
PK(PRI)
=
P
IN
V
IN(MIN)
• DC
MAX
• 1+
X
MIN
2






APPLICATIONS INFORMATION
where X
MIN
is peak-to-peak current ratio as defined earlier.
For each secondary-side power MOSFET, the peak cur-
rent is:
I
PK(SEC)
=
I
OUT
1−DC
MAX
• 1+
X
MIN
2






Select a primary-side power MOSFET with a BVDSS
greater than:
BV
DSS
≥I
PK
L
LKG
C
P
+ V
IN(MAX)
+
V
OUT(MAX)
N
SP
where NSP reflects the turns ratio of that secondary-to
primary winding. LLKG is the primary-side leakage induc-
tance and CP is the primary-side capacitance (mostly from
the drain capacitance (COSS) of the primary-side power
MOSFET). A clamp may be added to reduce the leakage
inductance as discussed.
For each secondary-side power MOSFET, the BV
DSS
should
be greater than:
BV
DSS
≥ V
OUT
+ V
IN(MAX)
• N
SP
Choose the primary-side MOSFET R
DS(ON)
at the nominal
gate drive voltage (7.5V). The secondary-side MOSFET gate
drive voltage depends on the gate drive method.
Primary-side power MOSFET RMS current is given by:
I
RMS(PRI)
=
P
IN
V
IN(MIN)
DC
MAX
For each secondary-side power MOSFET RMS current is
given by:
I
RMS(SEC)
=
I
OUT
1–DC
MAX
Calculate MOSFET power dissipation next. Because the
primary-side power MOSFET operates at high V
DS
, a
transition power loss term is included for accuracy. C
MILLER
is the most critical parameter in determining the transition
loss, but is not directly specified on the data sheets.