Datasheet

LTC4278
30
4278fc
APPLICATIONS INFORMATION
trace length and area to minimize stray capacitance and
potential noise pick-up.
You can synchronize the oscillator frequency to an external
frequency. This is done with a signal on the SYNC pin.
Set the LTC4278 frequency 10% slower than the desired
external frequency using the OSC pin capacitor, then use
a pulse on the SYNC pin of amplitude greater than 2V
and with the desired frequency. The rising edge of the
SYNC signal initiates an OSC capacitor discharge forcing
primary MOSFET off (PG voltage goes low). If the oscillator
frequency is much different from the sync frequency,
problems may occur with slope compensation and system
stability. Also, keep the sync pulse width greater than 500ns.
Selecting Timing Resistors
There are three internal “one-shot” times that are
programmed by external application resistors: minimum
on-time, enable delay time and primary MOSFET turn-on
delay. These are all part of the isolated flyback control
technique, and their functions are previously outlined in
the Theory of Operation section. The following information
should help in selecting and/or optimizing these timing
values.
Minimum Output Switch On-Time (t
ON(MIN)
)
Minimum on-time is the programmable period during which
current limit is blanked (ignored) after the turn-on of the
primary-side switch. This improves regulator performance
by eliminating false tripping on the leading edge spike in
the switch, especially at light loads. This spike is due to
both the gate/source charging current and the discharge
of drain capacitance. The isolated flyback sensing requires
a pulse to sense the output. Minimum on-time ensures
that the output switch is always on a minimum time and
that there is always a signal to close the loop.
The LTC4278 does not employ cycle skipping at light loads.
Therefore, minimum on-time along with synchronous
rectification sets the switch over to forced continuous
mode operation.
The t
ON(MIN)
resistor is set with the following equation
R
tON(MIN)
kW
( )
=
t
ON(MIN)
ns
( )
−104
1.063
Keep R
tON(MIN)
greater than 70k. A good starting value
is 160k.
Enable Delay Time (ENDLY)
Enable delay time provides a programmable delay between
turn-off of the primary gate drive node and the subsequent
enabling of the feedback amplifier. As discussed earlier, this
delay allows the feedback amplifier to ignore the leakage
inductance voltage spike on the primary side. The worst-
case leakage spike pulse width is at maximum load condi-
tions. So, set the enable delay time at these conditions.
While the typical applications for this part use forced
continuous operation, it is conceivable that a secondary-
side controller might cause discontinuous operation at
light loads. Under such conditions, the amount of energy
stored in the transformer is small. The flyback waveform
becomes “lazy” and some time elapses before it indicates
the actual secondary output voltage. The enable delay time
should be made long enough to ignore the “irrelevant”
portion of the flyback waveform at light loads.
Even though the LTC4278 has a robust gate drive, the gate
transition time slows with very large MOSFETs. Increase
delay time as required when using such MOSFETs.
The enable delay resistor is set with the following equation:
R
ENDLY
kW
( )
=
t
ENDLY
ns
( )
− 30
2.616
Keep R
ENDLY
greater than 40k. A good starting point is 56k.
Primary Gate Delay Time (PGDLY)
Primary gate delay is the programmable time from the
turn-off of the synchronous MOSFET to the turn-on of the
primary-side MOSFET. Correct setting eliminates overlap