Datasheet

LTC4278
17
4278fc
APPLICATIONS INFORMATION
To control the power-on surge currents in the system, the
LTC4278 provides a fixed inrush current, allowing C1 to
ramp up to the line voltage in a controlled manner.
The LTC4278 keeps the PD inrush current below the PSE
current limit to provide a well controlled power-up charac-
teristic that is independent of the PSE behavior. This ensures
a PD using the LTC4278 interoperability with any PSE.
TURN-ON/ TURN-OFF THRESHOLD
The IEEE 802.3af/at specification for the PD dictates a
maximum turn-on voltage of 42V and a minimum turn-off
voltage of 30V. This specification provides an adequate
voltage to begin PD operation, and to discontinue PD
operation when the input voltage is too low. In addition,
this specification allows PD designs to incorporate an ON/
OFF hysteresis window to prevent start-up oscillations.
The LTC4278 features an ON/OFF hysteresis window (see
Figure 5) that conforms with the IEEE 802.3af/at specifi-
cation and accommodates the voltage drop in the cable
and input diode bridge at the onset of the inrush current.
Once C1 is fully charged, the LTC4278 turns on is internal
MOSFET and passes power to the PD load. The LTC4278
continues to power the PD load as long as the input voltage
does not fall below the OFF threshold. When the LTC4278
input voltage falls below the OFF threshold, the PD load
Figure 5. LTC4278 ON/OFF and Overvoltage Lockout
V
PORTP
C1
5µF
MIN
V
PORTN
V
NEG
LTC4278
4278 F05
TO
PSE
ON/OFF AND
OVERVOLTAGE
LOCKOUT
CIRCUIT
PD
LOAD
CURRENT-LIMITED
TURN ON
+
V
PORTP
– V
PORTN
LTC4278
VOLTAGE POWER MOSFET
0V TO ON* OFF
>ON* ON
<OFF* OFF
>OVLO OFF
*INCLUDES ON/OFF HYSTERESIS
ON THRESHOLD ≅ 36.1V
OFF THRESHOLD ≅ 30.7V
OVLO THRESHOLD ≅ 71.0V
Figure 6. LTC4278 Power Good Functional and State Diagram
4278 F06
BOLD LINE INDICATES HIGH CURRENT PATH
PWRGD
POWER
NOT
GOOD
INRUSH COMPLETE
ON < V
PORTP
< OVLO
AND NOT IN THERMAL SHUTDOWN
V
PORTP
< OFF
V
PORTP
> OVLO
OR THERMAL SHUTDOWN
POWER
GOOD
29
PWRGD
LTC4278
30
V
NEG
27
V
NEG
26
V
PORTN
6
V
PORTN
OVLO
ON/OFF
TSD
5
CONTROL
CIRCUIT
is disconnected, and classification mode resumes. C1
discharges through the LTC4278 circuitry.
COMPLEMENTARY POWER GOOD
When LTC4278 fully charges the load capacitor (C1), power
good is declared and the LTC4278 load can safely begin
operation. The LTC4278 provides complementary power
good signals that remain active during normal operation
and are de-asserted when the input voltage falls below
the OFF threshold, when the input voltage exceeds the
overvoltage lockout (OVLO) threshold, or in the event of
a thermal shutdown (see Figure 6).
The PWRGD pin features an open collector output refer-
enced to V
NEG
which can interface directly with the UVLO
pin. When power good is declared and active, the PWRGD
pin is high impedance with respect to V
NEG
. An internal 14V
clamp protects the UVLO pin from an excessive voltage.
The active low PWRGD pin connects to an internal, open-
drain MOSFET referenced to V
PORTN
and may be used as
an indicator bit when power good is declared and active.
The PWRGD pin is low impedance with respect to V
PORTN
.