Datasheet

LTC4278
16
4278fc
APPLICATIONS INFORMATION
DETECTION V1
ON
OFF
OFF OFFON
τ = R
LOAD
C1
TRACKS
V
PORTN
DETECTION V2
TIME
PD CURRENT
50
40
30
V
PORTP
(V)
20
10
40mA
50
40
30
20
10
TIME
V
PORTP
– V
NEG
(V)
–10
TIME
–20
–30
V
PORTP
– T2P (V)
–40
–50
dV
dt
INRUSH
C1
=
4278 F04
INRUSH = 100mA R
CLASS
= 30.9Ω
I
LOAD
=
V
PORTN
R
LOAD
V
PORTP
PSE
I
IN
R
LOAD
R
CLASS
C1
R
CLASS
T2P
LTC4278
V
NEG
V
PORTN
1st CLASS
1st MARK 2nd MARK
DETECTION V1
DETECTION V2
1st MARK 2nd MARK
2nd CLASS
1st CLASS
2nd CLASS
LOAD, I
LOAD
INRUSH
Figure 4. V
NEG
, T2P and PD Current
as a Result of 2-Event Classification
SIGNATURE CORRUPT DURING MARK
As a member of the IEEE 802.3at working group, Linear
Technology noted that it is possible for a Type 2 PD to
receive a false indication of a 2-event classification if a
PSE port is pre-charged to a voltage above the detection
voltage range before the first detection cycle. The IEEE
working group modified the standard to prevent this pos-
sibility by requiring a Type 2 PD to corrupt the signature
resistance during the mark event, alerting the PSE not to
apply power. The LTC4278 conforms to this standard by
corrupting the signature resistance. This also discharges
the port before the PSE begins the next detection cycle.
PD STABILITY DURING CLASSIFICATION
Classification presents a challenging stability problem due
to the wide range of possible classification load current.
The onset of the classification load current introduces a
voltage drop across the cable and increases the forward
voltage of the input diode bridge. This may cause the PD
to oscillate between detection and classification with the
onset and removal of the classification load current.
The LTC4278 prevents this oscillation by introducing a
voltage hysteresis window between the detection and clas-
sification ranges. The hysteresis window accommodates
the voltage changes a PD encounters at the onset of the
classification load current, thus providing a trouble-free
transition between detection and classification modes.
The LTC4278 also maintains a positive I-V slope throughout
the classification range up to the on-voltage. In the event
a PSE overshoots beyond the classification voltage range,
the available load current aids in returning the PD back
into the classification voltage range. (The PD input may
otherwise be “trapped” by a reverse-biased diode bridge
and the voltage held by the 0.1μF capacitor).
INRUSH CURRENT
Once the PSE detects and optionally classifies the PD,
the PSE then applies powers on the PD. When the
LTC4278 input voltage rises above the on-voltage threshold,
LTC4278 connects V
NEG
to V
PORTN
through the internal
power MOSFET.