Datasheet

LTC2754
9
2754f
PIN FUNCTIONS
V
OSADJD
(Pin 20): DAC D Offset Adjust Pin. This control
pin can be used to null unipolar offset or bipolar zero error.
The offset voltage delta is inverted and attenuated such that
a 5V control voltage applied to V
OSADJD
produces ∆V
OS
=
-512 LSB (LTC2754-16) in any output range (assumes a
5V reference voltage at R
IND
). Tie to ground if not used.
V
OSADJC
(Pin 21): DAC C Offset Adjust Pin. This control
pin can be used to null unipolar offset or bipolar zero error.
The offset voltage delta is inverted and attenuated such that
a 5V control voltage applied to V
OSADJC
produces ∆V
OS
=
-512 LSB (LTC2754-16) in any output range (assumes a
5V reference voltage at R
INC
). Tie to ground if not used.
I
OUT1C
(Pin 22): DAC C Current Output. This pin is a virtual
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplifi er for DAC C (see Typical Applications).
R
FBC
(Pin 23): DAC C Feedback Resistor. For normal
operation tie to the output of the I/V converter amplifi er
for DAC C (see Typical Applications). The DAC output
current from I
OUT1D
fl ows through the feedback resistor
to the R
FBC
pin. The impedance looking into this pin is
10k to ground.
R
OFSC
(Pin 24): Bipolar Offset Network for DAC C. This
pin provides the translation of the output voltage range for
bipolar spans. Accepts up to ±15V; for normal operation
tie to the positive reference voltage at R
INC
(Pin 28). The
impedance looking into this pin is 20k to ground.
REFC (Pin 25): Inverted Reference Voltage for DAC C, with
internal connection to the reference inverting resistor. The
20k resistor is connected internally from REFC to R
COMC
.
For normal operation tie this pin to the output of reference
inverting amplifi er (see Typical Applications). Typically –5V;
accepts up to ±15V. The impedance looking into this pin
is 10k to ground (R
INC
and R
COMC
fl oating).
R
COMC
(Pin 26): Center Tap Point for Reference Amplifi er
Inverting Resistors. The 20k reference inverting resistors
are connected internally from R
INC
to R
COMC
and from
R
COMC
to REFC, respectively (see Block Diagram). For
normal operation tie R
COMC
to the negative input of external
reference inverting amplifi er (see Typical Applications).
GE
ADJC
(Pin 27): Gain Adjust Pin for DAC C. This control
pin can be used to null gain error or to compensate for
reference errors. Nominal adjustment range is ±512 LSB
(LTC2754-16) for a voltage input range of ±V
RINC
(i.e., ±5V
for a 5V reference input). Tie to ground if not used.
R
INC
(Pin 28): Input Resistor for Reference Inverting
Amplifi er. The 20k input resistor is connected internally
from R
INC
to R
COMC
. For normal operation tie R
INC
to the
external reference voltage V
REFC
(see Typical Applica-
tions). Any or all of these precision-matched resistor
sets (Each set comprising R
INX
, R
COMX
and R
EFX
) may be
used to invert one or more positive reference voltages to
the negative voltages needed by the DACs. Typically 5V;
accepts up to ±15V.
I
OUT2C
(Pin 29): DAC C Current Output Complement. Tie
I
OUT2C
to ground.
CLR (Pin 30): Asynchronous Clear Pin. When this pin is
low, all DAC registers (both code and span) are cleared to
zero. All DAC outputs are cleared to zero volts.
RFLAG (Pin 31): Reset Flag Pin. An active low output is
asserted when there is a power-on reset or a clear event.
Returns high when an Update command is executed.
M-SPAN (Pin 32): Manual Span Control Pin. M-SPAN is
used in conjunction with pins S2, S1 and S0 (Pins 33, 34
and 35) to confi gure all DACs for operation in a single,
fi xed output range.
To confi gure the part for manual-span use, tie M-SPAN
directly to V
DD
. The active output range is then set via
hardware pin strapping of pins S2, S1 and S0 (rather than
through the SPI port); and Write and Update commands
have no effect on the active output span.
To confi gure the part for SoftSpan use, tie M-SPAN di-
rectly to GND. The output ranges are then individually and
dynamically controllable through the SPI port; and pins
S2, S1 and S0 have no effect.
See ‘Manual Span Confi guration’ in the Operation sec-
tion. M-SPAN must be connected either directly to
GND (SoftSpan confi guration) or to V
DD
(manual-span
confi guration).