Datasheet

LTC2657
21
2657f
internal reference can drive up to 0.1µF capacitive load
without any stability problems. In order to ensure stable
operation, the capacitive load on the REFIN/OUT pin should
not exceed the capacitive load on the REFCOMP pin.
The DAC can also operate in External Reference mode using
command 0111b. In this mode, the REFIN/OUT pin acts as
an input that sets the DAC’s reference voltage. The input is
high impedance and does not load the external reference
source. The acceptable voltage range at this pin is 0.5V ≤
REFIN/OUT ≤ V
CC
/2. The resulting full-scale output voltage
is 2 • V
REFIN/OUT
. For using External Reference at Start-Up,
see the Power Supply Sequencing and Start-Up Section.
Integrated Reference Buffers
Each of the eight DACs in LTC2657 has its own integrated
high performance reference buffer. The buffers have very
high input impedance and do not load the reference voltage
source. These buffers shield the Reference Voltage from
glitches caused by DAC switching and thus minimize
DAC-to-DAC Dynamic Crosstalk. See the curve DAC-
to-DAC Crosstalk (Dynamic) in the Typical Performance
Characteristics section.
Voltage Outputs
Each of the eight rail-to-rail amplifi ers contained in LTC2657
has guaranteed load regulation when sourcing or sinking
up to 15mA at 5V (7.5mA at 3V).
Load regulation is a measure of the amplifi er’s ability to
maintain the rated voltage accuracy over a wide range of
load conditions. The measured change in output voltage
per milliampere of forced load current change is expressed
in LSB/mA.
DC output impedance is equivalent to load regulation, and
may be derived from it by simply calculating a change in units
from LSB/mA to Ohms. The amplifi ers’ DC output impedance
is 0.040 when driving a load well away from the rails.
When drawing a load current from either rail, the output
voltage headroom with respect to that rail is limited by the
30 typical channel resistance of the output devices; e.g.,
when sinking 1mA, the minimum output voltage = 30 • 1mA
= 30mV. See the graph Headroom at Rails vs Output Current
in the Typical Performance Characteristics section.
OPERATION
The amplifi ers are stable driving capacitive loads of up
to 1000pF.
Board Layout
The excellent load regulation and DC crosstalk performance
of these devices is achieved in part by keeping “signal”
and “power” grounds separate.
The PC board should have separate areas for the analog
and digital sections of the circuit. This keeps digital signals
away from sensitive analog signals and facilitates the use
of separate digital and analog ground planes which have
minimal capacitive and resistive interaction with each
other.
Digital and analog ground planes should be joined at only
one point, establishing a system star ground as close to
the device’s ground pin as possible. Ideally, the analog
ground plane should be located on the component side of
the board, and should be allowed to run under the part to
shield it from noise. Analog ground should be a continuous
and uninterrupted plane, except for necessary lead pads
and vias, with signal traces on another layer.
The GND pin functions as a return path for power supply
currents in the device and should be con-nected to analog
ground. The REFLO pin should be connected to system
star ground. Resistance from the REFLO pin to system
star ground should be as low as possible.
Rail-to-Rail Output Considerations
In any rail-to-rail voltage output device, the output is limited
to voltages within the supply range.
Since the analog outputs of the device cannot go below
ground, they may limit for the lowest codes as shown in
Figure 3b. Similarly, limiting can occur in External Refer-
ence mode near full-scale when the REFIN/OUT pin is at
V
CC
/2 . If V
REFIN/OUT
= V
CC
/2 and the DAC full-scale error
(FSE) is positive, the output for the highest codes limits
at V
CC
as shown in Figure 3c. No full-scale limiting can
occur if V
REFIN/OUT
≤ (V
CC
– FSE)/2.
Offset and linearity are defi ned and tested over the region
of the DAC transfer function where no output limiting can
occur.