Datasheet

LTC2393-16
14
239316fa
APPLICATIONS INFORMATION
Signal-to-Noise Ratio (SNR)
The signal-to-noise ratio (SNR) is the ratio between the
RMS amplitude of the fundamental input frequency and
the RMS amplitude of all other frequency components
except the first five harmonics and DC. Figure 5 shows
that the LTC2393-16 achieves a typical SNR of 94.2dB at
a 1MHz sampling rate with a 20kHz input.
Total Harmonic Distortion (THD)
Total harmonic distortion (THD) is the ratio of the RMS sum
of all harmonics of the input signal to the fundamental itself.
The out-of-band harmonics alias into the frequency band
between DC and half the sampling frequency (f
SMPL
/2).
THD is expressed as:
THD= 20 log
V
2
2
+ V
3
2
+ V
4
2
...V
N
2
V
1
where V
1
is the RMS amplitude of the fundamental fre-
quency and V
2
through V
N
are the amplitudes of the second
through Nth harmonics.
POWER CONSIDERATIONS
The LTC2393-16 provides three sets of power supply
pins: the analog 5V power supply (AVP), the digital 5V
power supply (DVP) and the digital input/output interface
power supply (OVP). The flexible OVP supply allows the
LTC2393-16 to communicate with any digital logic operating
between 1.8V and 5V, including 2.5V and 3.3V systems.
Power Supply Sequencing
The LTC2393-16 does not have any specific power supply
sequencing requirements. Care should be taken to observe
the maximum voltage relationships described in the Ab-
solute Maximum Ratings section. The LTC2393-16 has a
power-on-reset (POR) circuit. With the POR, the result of
the first conversion is valid after power has been applied
to the ADC. The LTC2393-16 will reset itself if the power
supply voltage drops below 2.5V. Once the supply voltage
is brought back to its nominal value, the POR will reinitial-
ize the ADC and it will be ready to start a new conversion.
Nap Mode
The LTC2393-16 can be put into the nap mode after a
conversion has been completed to reduce the power
consumption between conversions. In this mode some
of the circuitry on the device is turned off. Nap mode is
enabled by keeping CNVST low between conversions. When
the next conversion is requested, bring CNVST high and
hold for at least 250ns, then start the next conversion by
bringing CNVST low. See Figure 6.
Power Shutdown Mode
When PD is tied high, the LTC2393-16 enters power shut-
down and subsequent requests for conversion are ignored.
Before entering power shutdown, the digital output data
needs to be read. However, if a request for power shutdown
(PD = high) occurs during a conversion, the conversion
Figure 6. Nap Mode Timing for the LTC2393-16
CNVST
BUSY
NAP
t
CONV
t
ACQ
NAP MODE
239316 F06
t
5