Datasheet
LTC2460/LTC2462
7
24602fa
applicaTions inForMaTion
CONVERTER OPERATION
Converter Operation Cycle
The LTC2460/LTC2462 are low power, delta sigma, ana-
log to digital converters with a simple SPI interface (see
Figure 1). The LTC2462 has a fully differential input while
the LTC2460 is single-ended. Both are pin and software
compatible. Their operation is composed of three distinct
states: CONVERT, SLEEP/NAP, and DATA INPUT/OUTPUT.
The operation begins with the CONVERT state (see Fig-
ure 2). Once the conversion is finished, the converter
automatically powers down (NAP) or under user control,
both the converter and reference are powered down
(SLEEP). The conversion result is held in a static register
while the device is in this state. The cycle concludes with
the DATA INPUT/OUTPUT state. Once all 16-bits are read
or an abort is initiated the device begins a new conversion.
The CONVERT state duration is determined by the LTC2460/
LTC2462 conversion time (nominally 16.6 milliseconds).
Once started, this operation can not be aborted except by a
low power supply condition (V
CC
< 2.1V) which generates
an internal power-on reset signal.
After the completion of a conversion, the LTC2460/LTC2462
enters the SLEEP/NAP state and remains there until the
chip select is LOW (CS = LOW). Following this condition,
the ADC transitions into the DATA INPUT/OUTPUT state.
Figure 2. LTC2460/LTC2462 State Transition Diagram
While in the SLEEP/NAP state, when chip select input is
HIGH (CS = HIGH), the LTC2460/LTC2462’s converters
are powered down. This reduces the supply current by
approximately 50%. While in the Nap state the reference
remains powered up. In order to power down the reference
in addition to the converter, the user can select the SLEEP
DATA INPUT/OUTPUT
SLEEP/NAP
CONVERT
POWER-ON RESET
YES
24602 F02
16TH FALLING
EDGE OF SCK
OR
CS = HIGH?
CS = LOW?
NO YES
NO
block DiagraM
Figure 1. Functional Block Diagram
∆Σ A/D
CONVERTER
DECIMATING
SINC FILTER
SDO
REFOUT COMP
REF
–
IN
+
(IN)
IN
–
(GND)
SCK
CS
24602 BD
–
∆Σ A/D
CONVERTER
INTERNAL
REFERENCE
( ) PARENTHESIS INDICATE LTC2460
SPI
INTERFACE
INTERNAL
OSCILLATOR
1
V
CC
122
3
5
6
SDI
4
8
GND
7,11,13 (DD PACKAGE)
9
10