Datasheet

LTM4619
17
4619fb
For more information www.linear.com/LTM4619
applicaTions inForMaTion
Figure 17. Recommended PCB Layout
TOP VIEW
1 2 3 4 5 6 7 8 109 11 12
L
K
J
H
G
F
E
D
C
B
M
A
PGND PGNDV
IN
PGNDV
OUT2
V
OUT1
C
OUT1
C
OUT2
C
IN2
C
IN1
Layout Checklist/Example
The high integration of LTM4619 makes the PCB board
layout very simple and easy. However, to optimize its electri
-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path, includ
-
ing V
IN
, PGND, V
OUT1
and V
OUT2
. It helps to minimize
the PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capaci
-
tors next to the V
IN
, PGND and V
OUT
pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnections
between top layer and other power layers.
• Do not put vias directly on the pads.
• Use a separated SGND ground copper area for com
-
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
•
Decouple the input and output grounds to lower the
output ripple noise.
Figure 17 gives a good example of the recommended layout.