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LTC2301/LTC2305

23015fb

BLOCK DIAGRAM

FEATURES

APPLICATIONS

DESCRIPTION

1-/2-Channel, 12-Bit ADCs

with I

C Compatible Interface

The LTC

2301/LTC2305 are low noise, low power,

1-/2-channel, 12-bit successive approximation ADCs

with an I

C compatible serial interface. These ADCs include

an internal reference and a fully differential sample-and-

hold circuit to reduce common mode noise. The LTC2301/

LTC2305 operate from an internal clock to achieve a fast

1.3µs conversion time.

The LTC2301/LTC2305 operate from a single 5V supply

and draw just 300µA at a throughput rate of 1ksps. The

ADC enters nap mode when not converting, reducing the

power dissipation.

The LTC2301/LTC2305 are available in small 12-pin

4mm × 3mm DFN and 12-pin MSOP packages. The in-

ternal 2.5V reference further reduces PCB board space

requirements.

The low power consumption and small size make the

LTC2301/LTC2305 ideal for battery operated and portable

applications, while the 2-wire I

C compatible serial interface

makes these ADCs a good match for space-constrained

systems.

12-Bit I

C ADC Family

Input Channels 1 2 8

Part Number LTC2301 LTC2305 LTC2309

Integral Nonlinearity vs Output Code (LTC2305)

12-Bit Resolution

Low Power: 1.5mW at 1ksps, 35μW Sleep Mode

14ksps Throughput Rate

Internal Reference

Low Noise: SNR = 73.5dB

Guaranteed No Missing Codes

Single 5V Supply

2-wire I

C Compatible Serial Interface with 9

Addresses Plus One Global for Synchronization

Fast Conversion Time: 1.3s

1-Channel (LTC2301) and 2-Channel (LTC2305)

Versions

Unipolar or Bipolar Input Ranges (Software

Selectable)

Internal Conversion Clock

Guaranteed Operation from –40°C to 125°C

(MSOP Package)

12-Pin 4mm × 3mm DFN and 12-Pin MSOP

Packages

Industrial Process Control

Motor Control

Accelerometer Measurements

Battery Operated Instruments

Isolated and/or Remote Data Acquisition

Power Supply Monitoring

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

23015 TA01a

–

12-BIT

SAR ADC

ANALOG

INPUT

MUX

ANALOG INPUT

0V TO 4.096V UNIPOLAR

±2.048V BIPOLAR

PORT

INTERNAL

2.5V REF

0.1µF 10µF

2.2µF

REF

REFCOMP

SCL

SDA

AD1

AD0

CH0(IN

)

CH1(IN

)

PIN NAMES IN PARENTHESES

REFER TO LTC2301

10µF 0.1µF

LTC2301

LTC2305

GND

OUTPUT CODE

INL (LSB)

1.00

0.75

0.25

–0.25

–0.75

0.50

0.00

–0.50

–1.00

20481024 3072

23015 TA01b

4096

Summary of content (26 pages)

PAGE 1
LTC2301/LTC2305 1-/2-Channel, 12-Bit ADCs with I2C Compatible Interface DESCRIPTION FEATURES n n n n n n n n n n n n n n 12-Bit Resolution Low Power: 1.5mW at 1ksps, 35μW Sleep Mode 14ksps Throughput Rate Internal Reference Low Noise: SNR = 73.5dB Guaranteed No Missing Codes Single 5V Supply 2-wire I2C Compatible Serial Interface with 9 Addresses Plus One Global for Synchronization Fast Conversion Time: 1.
PAGE 2
LTC2301/LTC2305 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltage (VDD) ................................ –0.3V to 6.0V Analog Input Voltage (Note 3) CH0(IN+), CH1(IN–), REF, REFCOMP .............(GND – 0.3V) to (VDD + 0.3V) Digital Input Voltage..........(GND – 0.3V) to (VDD + 0.3V) Digital Output Voltage .......(GND – 0.3V) to (VDD + 0.3V) Power Dissipation ...............................................500mW Operating Temperature Range LTC2301C/LTC2305C ...............................
PAGE 3
LTC2301/LTC2305 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2305IMS#PBF LTC2305IMS#TRPBF 2305 12-Lead Plastic MSOP –40°C to 85°C LTC2305HMS#PBF LTC2305HMS#TRPBF 2305 12-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based ﬁnish parts.
PAGE 4
LTC2301/LTC2305 DYNAMIC ACCURACY The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C and AIN = –1dBFS. (Notes 4,9) SYMBOL PARAMETER CONDITIONS MIN TYP SINAD Signal-to-(Noise + Distortion) Ratio fIN = 1kHz l 71 73.4 SNR Signal-to-Noise Ratio THD Total Harmonic Distortion fIN = 1kHz l 71 73.
PAGE 5
LTC2301/LTC2305 POWER REQUIREMENTS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN l 4.75 TYP MAX UNITS VDD Supply Voltage 5 5.25 V IDD Supply Current Nap Mode Sleep Mode 14ksps Sample Rate SLP Bit = 0, Conversion Done SLP Bit = 1, Conversion Done l l l 2.3 225 7 3.
PAGE 6
LTC2301/LTC2305 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values are with respect to ground. Note 3: When these pin voltages are taken below ground or above VDD, they will be clamped by internal diodes.
PAGE 7
LTC2301/LTC2305 TYPICAL PERFORMANCE CHARACTERISTICS (LTC2301) TA = 25°C, VDD = 5V, fSMPL = 14ksps, unless otherwise noted. 1.00 1.00 0.75 0.75 0.50 0.50 0.25 0.25 0.00 –0.25 0.00 –0.25 –0.50 –0.50 –0.75 –0.75 –1.00 1024 0 2048 3072 OUTPUT CODE 4096 1kHz Sine Wave 8192 Point FFT Plot MAGNITUDE (dB) Differential Nonlinearity vs Output Code DNL (LSB) INL (LSB) Integral Nonlinearity vs Output Code –1.
PAGE 8
LTC2301/LTC2305 TYPICAL PERFORMANCE CHARACTERISTICS (LTC2305) TA = 25°C, VDD = 5V, fSMPL = 14ksps, unless otherwise noted. Differential Nonlinearity vs Output Code 1.00 0.75 0.75 0.50 0.50 0.25 0.25 0.00 –0.25 0.00 –0.25 –0.50 –0.50 –0.75 –0.75 –1.00 –1.00 1024 0 2048 3072 OUTPUT CODE 1kHz Sine Wave 8192 Point FFT Plot 4096 1024 0 2048 3072 OUTPUT CODE 4096 Supply Current vs Sampling Frequency Offset Error vs Temperature FULL-SCALE ERROR (LSB) OFFSET ERROR (LSB) 0.5 0.
PAGE 9
LTC2301/LTC2305 PIN FUNCTIONS (LTC2301) GND (Pins 1, 4, 9): Ground. All GND pins must be connected to a solid ground plane. SDA (Pin 2): Bidirectional Serial Data Line of the I2C Interface. In transmitter mode (read), the conversion result is output at the SDA pin, while in receiver mode (write), the DIN word is input at the SDA pin to conﬁgure the ADC.
PAGE 10
LTC2301/LTC2305 PIN FUNCTIONS (LTC2305) GND (Pins 1, 4, 9): Ground. All GND pins must be connected to a solid ground plane. SDA (Pin 2): Bidirectional Serial Data Line of the I2C Interface. In transmitter mode (read), the conversion result is output at the SDA pin, while in receiver mode (write), the DIN word is input at the SDA pin to conﬁgure the ADC.
PAGE 11
LTC2301/LTC2305 FUNCTIONAL BLOCK DIAGRAM VDD AD1 AD0 LTC2301 LTC2305 CH0(IN+) CH1(IN–) + ANALOG INPUT MUX 12-BIT SAR ADC I2C PORT SCL 8k VREF SDA – INTERNAL 2.5V REF GAIN = 1.
PAGE 12
LTC2301/LTC2305 APPLICATIONS INFORMATION Overview The LTC2301/LTC2305 are low noise, 1-/2-channel, 12-bit successive approximation register (SAR) A/D converters with an I2C compatible serial interface. The LTC2301/ LTC2305 both include a precision internal reference. The LTC2305 includes a 2-channel analog input multiplexer (MUX) while the LTC2301 includes an input MUX that allows the polarity of the differential input to be selected. These ADCs can operate in either unipolar or bipolar mode.
PAGE 13
LTC2301/LTC2305 APPLICATIONS INFORMATION Driving the Analog Inputs Table 2. Channel Conﬁguration for the LTC2301 O/S IN+ IN– 0 + – 1 – + 1 Differential + (–) – (+) { 2 Single-Ended + + CH0 CH1 CH0 CH1 LTC2305 LTC2305 GND (–) 1 Differential + (–) – (+) { CH0 CH1 Input Filtering The noise and distortion of the input ampliﬁer and other circuitry must be considered since they will add to the ADC noise and distortion.
PAGE 14
LTC2301/LTC2305 APPLICATIONS INFORMATION The magnitude of the DC current is then approximately IDC = (VIN – VREFCOMP/2)/REQ, which is roughly proportional to VIN. To prevent large DC drops across the resistor RFILTER, a ﬁlter with a small resistor and large capacitor should be chosen. When running at the maximum throughput rate of 14ksps, the input current equals 1.5μA at VIN = 4.096V, which amounts to a full-scale error of 0.5 LSBs when using a ﬁlter resistor (RFILTER) of 333Ω.
PAGE 15
LTC2301/LTC2305 APPLICATIONS INFORMATION MAGNITUDE (dB) frequency. Figure 4 shows a typical SINAD of 73.2dB with a 14kHz sampling rate and a 1kHz input. A SNR of 73.3dB can be achieved with the LTC2301/LTC2305. 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 SNR = 73.2 dB SINAD = 73.1 dB THD = –90dB noise performance. The internal reference buffer can also be overdriven from 1V to VDD with an external reference at REFCOMP, as shown in Figure 5c.
PAGE 16
LTC2301/LTC2305 APPLICATIONS INFORMATION Internal Conversion Clock START Condition The internal conversion clock is factory trimmed to achieve a typical conversion time (tCONV) of 1.3μs and a maximum conversion time of 1.6μs over the full operating temperature range. I2C Interface STOP Condition SDA S SCL SDA SCL P 23015 F06 Figure 6. Timing Diagrams of START and STOP Conditions I2C The LTC2301/LTC2305 communicate through an interface.
PAGE 17
LTC2301/LTC2305 APPLICATIONS INFORMATION Output Data Format The output register contains the last conversion result. After each conversion is completed, the device automatically enters either nap or sleep mode depending on the setting of the SLP bit (see Nap Mode and Sleep Mode sections). When the LTC2301/LTC2305 is addressed for a read operation, it acknowledges by pulling SDA LOW and acts as a transmitter. The master/receiver can read up to two bytes from the LTC2301/LTC2305.
PAGE 18
LTC2301/LTC2305 APPLICATIONS INFORMATION After power-up, the ADC initiates an internal reset cycle which sets the DIN word to all 0s (S/D=O/S=UNI=SLP=0). A write operation may be performed if the default state of the ADC’s conﬁguration is not desired. Otherwise, the ADC must be properly addressed and followed by a STOP condition to initiate a conversion. Table 2.
PAGE 19
LTC2301/LTC2305 APPLICATIONS INFORMATION Continuous Read/Write Once the conversion cycle is complete, the LTC2301/ LTC2305 can be written to and then read from using the repeated START (Sr) command. Figure 9 shows a cycle which begins with a data write, a repeated START, followed by a read and concluded with a STOP command. After all 16 bits are read out, a conversion may be initiated by issuing a STOP command. The following conversion will be performed using the newly programmed data.
PAGE 20
LTC2301/LTC2305 APPLICATIONS INFORMATION Sleep Mode performed, acquisition of the input signal begins on the rising edge of the 9th clock pulse following the address frame, as shown in Figure 12a. The ADCs enter sleep mode after a conversion is complete (tCONV) if the SLP bit is set to a logic 1. The ADCs draw only 7μA in sleep mode, provided that none of the digital inputs are switching.
PAGE 21
LTC2301/LTC2305 APPLICATIONS INFORMATION for the common return of these bypass capacitors is essential to the low noise operation of the ADC. These traces should be as wide as possible. See Figures 15a–15e for a suggested layout. 011...111 111...111 BIPOLAR ZERO 011...110 111...110 OUTPUT CODE OUTPUT CODE (TWO’S COMPLEMENT) separated as much as possible. Care should be taken not to run any digital signals alongside an analog signal. All analog inputs should be shielded by GND.
PAGE 22
LTC2301/LTC2305 APPLICATIONS INFORMATION Figure 15b. Topside Figure 15c. Layer 2 Ground Plane Figure 15d. Layer 3 Power Plane Figure 15e.
PAGE 23
LTC2301/LTC2305 PACKAGE DESCRIPTION DE/UE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1695) 0.70 p0.05 3.60 p0.05 2.20 p0.05 3.30 p0.05 1.70 p 0.05 PACKAGE OUTLINE 0.25 p 0.05 0.50 BSC 2.50 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 p0.10 (2 SIDES) 7 R = 0.115 TYP 0.40 p 0.10 12 R = 0.05 TYP PIN 1 TOP MARK (NOTE 6) 0.200 REF 3.00 p0.10 (2 SIDES) 3.30 p0.10 1.70 p 0.10 PIN 1 NOTCH R = 0.20 OR 0.35 s 45o CHAMFER 0.
PAGE 24
LTC2301/LTC2305 PACKAGE DESCRIPTION MS Package 12-Lead Plastic MSOP (Reference LTC DWG # 05-08-1668 Rev Ø) 0.889 p 0.127 (.035 p .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 4.039 p 0.102 (.159 p .004) (NOTE 3) 0.65 (.0256) BSC 0.42 p 0.038 (.0165 p .0015) TYP 12 11 10 9 8 7 RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) DETAIL “A” 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) 0o – 6o TYP 0.406 p 0.076 (.016 p .003) REF GAUGE PLANE 0.53 p 0.152 (.021 p .006) 1 2 3 4 5 6 1.
PAGE 25
LTC2301/LTC2305 REVISION HISTORY (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 8/10 Revised Typical Performance Characteristics curves G03 and G12 7, 8 Revised VREF, REFCOMP and VDD descriptions in Pin Functions section 9, 10 Revised Figure 4 in Applications Information section 15 Revised Figures 5a, 5b and 5c, Internal Reference section and I2C Interface section in Applications Information 15, 16 Changed “NAK” command to NACK 16, 17 23015fb Information furnished b
PAGE 26
LTC2301/LTC2305 TYPICAL APPLICATION Driving the LTC2305 with ±10V Input Signals Using a Precision Attenuator 5V IN OUT LT1790-2.5 0.1μF 1μF 5V GND 10V 10μF 0.1μF 7 8 450k 50k 9 150k 10 1.7k 1.7k LTC2305 – 450k 1 450k AD1 AD0 VDD + 4pF LT1991 6 100Ω CH0 47pF CH1 450k ANALOG INPUT MUX + – SCL I2C PORT 12-BIT SAR ADC CONTROL LOGIC (FPGA, CPLD, DSP, ETC) SDA 2 150k ±10V INPUT SIGNAL 3 50k 4pF 4 INTERNAL 2.5V REF 5 VREF 2.2μF –10V REFCOMP GND 0.