Datasheet

LTC4265
5
4265fa
PIN FUNCTIONS
SHDN (Pin 1): Shutdown Input. Use this pin for auxiliary
power application. Drive SHDN high to disable LTC4265
operation and corrupt the signature resistance. If unused,
tie SHDN to V
IN
.
T2PSE (Pin 2): Type-2 PSE Indicator, Open-Drain. Low
impedance indicates the presence of a Type-2 PSE.
R
CLASS
(Pin 3): Class Select Input. Connect a resistor
between R
CLASS
and V
IN
to set the classifi cation load
current. (See Table 2.)
NC (Pin 4, 11): No Connect.
V
IN
(Pins 5, 6): Input Voltage, Negative Rail. Pins 5 and 6
must be electrically tied together at the package.
V
OUT
(Pins 7, 8): Output Voltage Negative Rail. Connects
V
OUT
to V
IN
through an internal power MOSFET. Pins 7
and 8 must be electrically tied together at the package.
PWRGD (Pin 9): Power Good Output, Open Collector.
High impedance signals power-up completion. PWRGD
is referenced to V
OUT
and features a 14V clamp.
PWRGD (Pin 10): Complementary Power Good Output,
Open-Drain. Low impedance signals power up completion.
PWRGD is referenced to V
IN
.
GND (Pin 12): Input Voltage, Positive Rail. This pin is
connected to the PD positive rail.
Exposed Pad (Pin 13): Tie to V
IN
and PCB heat sink.
BLOCK DIAGRAM
4265 BD
BOLD LINE INDICATES
HIGH CURRENT PATH
12
T2PSE
2
R
CLASS
3
NC
4
SHDN
PWRGD
GND
11
NC
1
10
PWRGD
9
V
OUT
8
V
OUT
7
CONTROL
CIRCUITS
CLASSIFICATION
CURRENT LOAD
REF
–
+
25k 14k
EXPOSED PAD
13
V
IN
6
V
IN
5
EN