Datasheet

LTM4601AHV
10
4601ahvfc
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The typical LTM4601AHV application circuits are shown in
Figures 19 and 20. External component selection is primar-
ily determined by the maximum load current and output
voltage. Refer to
T
able 2 for specific external capacitor
requirements for a particular application.
V
IN
to V
OUT
Step-Down Ratios
There are restrictions in the maximum V
IN
and V
OUT
step
down ratio that can be achieved for a given input voltage.
These constraints are shown in the Typical Performance
Characteristics curves labeled “V
IN
to V
OUT
Step-Down
Ratio”. Note that additional thermal derating may apply. See
the Thermal Considerations and Output Current Derating
section of this data sheet.
Output Voltage Programming and Margining
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 1M and a 60.4k 0.5%
internal feedback resistor connects V
OUT
and V
FB
pins
together. The V
OUT_LCL
pin is connected between the 1M
and the 60.4k resistor. The 1M resistor is used to protect
against an output overvoltage condition if the V
OUT_LCL
pin is not connected to the output, or if the remote sense
amplifier output is not connected to V
OUT_LCL
. In these
cases, the output voltage will default to 0.6V. Adding a
resistor R
SET
from the V
FB
pin to SGND pin programs
the output voltage:
V
OUT
= 0.6V
60.4k + R
SET
R
SET
or equivalently:
R
SET
=
60.4k
V
OUT
0.6V
1
Table 1. Standard 1% Resistor Values
R
SET
(kΩ)
Open 60.4 40.2 30.1 25.5 19.1 13.3 8.25
V
OUT
(V)
0.6 1.2 1.5 1.8 2 2.5 3.3 5
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference ±
offset for margining. A 1.18V reference divided by the
R
PGM
resistor on the MPGM pin programs the current.
Calculate V
OUT(MARGIN)
:
V
OUT(MARGIN)
=
%V
OUT
100
V
OUT
where %V
OUT
is the percentage of V
OUT
you want to
margin, and V
OUT(MARGIN)
is the margin quantity in volts:
R
PGM
=
V
OUT
0.6V
1.18V
V
OUT(MARGIN)
10k
where R
PGM
is the resistor value to place on the MPGM
pin to ground.
The margining voltage, V
OUT(MARGIN)
, will be added or
subtracted from the nominal output voltage as determined
by the state of the MARG0 and MARG1 pins. See the truth
table below:
MARG1 MARG0 MODE
LOW LOW NO MARGIN
LOW HIGH MARGIN UP
HIGH LOW MARGIN DOWN
HIGH HIGH NO MARGIN
Input Capacitors
LTM4601AHV module should be connected to a low AC
impedance DC source. Input capacitors are required to
be placed adjacent to the module. In Figure 20, the 10µF
ceramic input capacitors are selected for their ability to
handle the large RMS current into the converter. An input
bulk capacitor of 100µF is optional. This 100µF capacitor
is only needed if the input source impedance is compro
-
mised by long inductive leads or traces.
applicaTions inForMaTion