Datasheet

LTC4269-1
35
42691fc
APPLICATIONS INFORMATION
to roughly 7.5V, so you can safely use MOSFETs with
maximum V
GS
of 10V and larger.
Synchronous Gate Drive
There are several different ways to drive the synchronous
gate MOSFET. Full converter isolation requires the synchro-
nous gate drive to be isolated. This is usually accomplished
by way of a pulse transformer. Usually the pulse driver is
used to drive a buffer on the secondary, as shown in the
application on the front page of this data sheet.
However, other schemes are possible. There are gate drivers
and secondary-side synchronous controllers available that
provide the buffer function as well as additional features.
Capacitor Selection
In a fl yback converter, the input and output current fl ows
in pulses, placing severe demands on the input and output
fi lter capacitors. The input and output fi lter capacitors are
selected based on RMS current ratings and ripple voltage.
Select an input capacitor with a ripple current rating
greater than:
I
RMS(PRI)
=
P
IN
V
IN(MIN)
1−DC
MAX
DC
MAX
Continuing the example:
I
RMS(PRI)
=
29.5W
41V
1−49.4%
49.4%
= 0.728A
Keep input capacitor series resistance (ESR) and inductance
(ESL) small, as they affect electromagnetic interference
suppression. In some instances, high ESR can also
produce stability problems because fl yback converters
exhibit a negative input resistance characteristic. Refer
to Application Note 19 for more information.
The output capacitor is sized to handle the ripple current
and to ensure acceptable output voltage ripple. The output
capacitor should have an RMS current rating greater
than:
I
RMS(SEC)
=I
OUT
DC
MAX
1−DC
MAX
Continuing the example:
I
RMS(SEC)
= 5.3A
49.4%
1−49.4%
= 5.24A
This is calculated for each output in a multiple winding
application.
ESR and ESL along with bulk capacitance directly affect the
output voltage ripple. The waveforms for a typical fl yback
converter are illustrated in Figure 17.
The maximum acceptable ripple voltage (expressed as a
percentage of the output voltage) is used to establish a
starting point for the capacitor values. For the purpose of
simplicity, we will choose 2% for the maximum output
OUTPUT VOLTAGE
RIPPLE WAVEFORM
SECONDARY
CURRENT
PRIMARY
CURRENT
I
PRI
∆V
COUT
42691 F17
RINGING
DUE TO ESL
I
PRI
N
∆V
ESR
Figure 17. Typical Flyback Converter Waveforms
ripple, divided equally between the ESR step and the
charging/discharging ΔV. This percentage ripple changes,
depending on the requirements of the application. You can
modify the following equations.
For a 1% contribution to the total ripple voltage, the ESR
of the output capacitor is determined by:
ESR
COUT
≤ 1% •
V
OUT
•1−DC
MAX
()
I
OUT