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LTC4269-1

42691fc

•

33mΩ

39k

10µF

30.9

1.21k38.3k100k12k

10nF

10µF

2.2µF

0.1µF

33pF

0.1µF

2.2nF

1µF

SYNC PGDLY

UVLOPWRGD

SENSE

–

CMP

SENSE

CMP

NEG

SHDN

CLASS

PORTP

PORTN

ENDLYOSC

LTC4269-1

GND

CMP

10µH

TO MICRO

CONTROLLER

•

47µF

0.18µH

100µF

3.01k

27.4k

T2P

14k

383k

54V FROM

DATA PAIR

54V FROM

SPARE PAIR

–

42691 TA01a

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

IEEE 802.3at PD with

Synchronous No-Opto

Flyback Controller

The LTC

4269-1 is an integrated Powered Device (PD)

controller and switching regulator intended for high

power IEEE 802.3at and 802.3af applications. The

LTC4269-1 is targeted for high efﬁ ciency, single and

multioutput applications from 10W to 25W. By support-

ing both 1-event and 2-event classiﬁ cations, as deﬁ ned

by the IEEE, the LTC4269-1 can be used in a wide range

of product conﬁ gurations.

The LTC4269-1 synchronous, current mode, ﬂ yback con-

troller generates multiple supply rails in a single conversion

step providing for the highest system efﬁ ciency while main-

taining tight regulation across all outputs. The LTC4269-1

includes Linear Technology’s patented No-Opto feedback

topology to provide full IEEE 802.3 isolation without the

need of an opto-isolator circuit. A true soft-start function

allows graceful ramp-up of all output voltages.

All Linear Technology PD solutions include a shutdown

pin to provide ﬂ exible auxiliary power options. The

LTC4269-1 can accommodate adaptor voltages from 18V

to 60V and supports both PoE or aux dominance options.

The LTC4269-1 is available in a space saving 32-pin DFN

package.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. All other

trademarks are the property of their respective owners. Protected by U.S. Patents, including

5841643.

25.5W IEEE 802.3at Compliant (Type 2) PD

Integrated State-of-the-Art Synchronous Flyback

Controller

– Isolated Power Supply Efﬁ ciency >92%

– 88% Efﬁ ciency Including Diode Bridge and

Hot Swap™ FET

Flexible Integrated Auxiliary Power Support

Superior EMI Performance

Robust 100V 0.7Ω (Typ) Integrated Hot Swap MOSFET

IEEE 802.3at

High Power Available

Indicator

Integrated Signature Resistor and Programmable

Class Current

Undervoltage, Overvoltage and Thermal Protection

Short-Circuit Protection with Auto-Restart

Programmable Soft-Start and Switching Frequency

Complementary Power Good Indicators

Thermally Enhanced 7mm × 4mm DFN Package

VoIP Phones with Advanced Display Options

Dual-Radio Wireless Access Points

PTZ Security Cameras

RFID Readers

Industrial Controls

25W High Efﬁ ciency PD Solution

Summary of content (44 pages)

PAGE 1
LTC4269-1 IEEE 802.3at PD with Synchronous No-Opto Flyback Controller DESCRIPTION FEATURES n n n n n n n n n n n n The LTC®4269-1 is an integrated Powered Device (PD) controller and switching regulator intended for high power IEEE 802.3at and 802.3af applications. The LTC4269-1 is targeted for high efﬁciency, single and multioutput applications from 10W to 25W. By supporting both 1-event and 2-event classiﬁcations, as deﬁned by the IEEE, the LTC4269-1 can be used in a wide range of product conﬁgurations.
PAGE 2
LTC4269-1 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) TOP VIEW Pins with Respect to VPORTN VPORTP Voltage......................................... –0.3V to 100V VNEG Voltage ......................................... –0.3V to VPORTP VNEG Pull-Up Current ..................................................1A SHDN ....................................................... –0.3V to 100V RCLASS, Voltage ............................................ –0.3V to 7V RCLASS Source Current......................
PAGE 3
LTC4269-1 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. PARAMETER CONDITIONS MIN TYP MAX UNITS 60 9.8 21 37.2 V V V V V V Interface Controller (Note 4) Operating Input Voltage Signature Range Classiﬁcation Range ON Voltage OFF Voltage Overvoltage Lockout At VPORTP (Note 5) l l l l 1.5 12.5 30.0 71 ON/OFF Hysteresis Window l 4.1 V Signature/Class Hysteresis Window l 1.
PAGE 4
LTC4269-1 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. PARAMETER CONDITIONS MIN TYP MAX UNITS PWM Controller (Note 10) Power Supply VCC Turn-On Voltage, VCC(ON) l 14 15.3 16 V VCC Turn-Off Voltage, VCC(OFF) ● 8 9.7 11 V 6.5 V VCC Hysteresis VCC(ON) – VCC(OFF) ● 4 5.6 VCC Shunt Clamp VUVLO = 0V, IVCC = 15mA ● 19.5 20.
PAGE 5
LTC4269-1 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. PARAMETER CONDITIONS MIN TYP MAX UNITS Load Compensation Load Compensation to VSENSE Offset Voltage VRCMP with VSENSE+ = 0V 1 mV Feedback Pin Load Compensation Current VSENSE+ = 20mV, VFB = 1.230V 20 μA UVLO Function ● UVLO Pin Threshold (VUVLO) UVLO Pin Bias Current VUVLO = 1.2V VUVLO = 1.
PAGE 6
LTC4269-1 TYPICAL PERFORMANCE CHARACTERISTICS Input Current vs Input Voltage 25k Detection Range Input Current vs Input Voltage 50 TA = 25°C VPORTP CURRENT (mA) VPORTP CURRENT (mA) TA = 25°C 0.3 0.2 30 CLASS 3 20 CLASS 2 CLASS 1 0.1 10 0 0 CLASS 1 OPERATION CLASS 4 40 0.4 Input Current vs Input Voltage 11.0 VPORTP CURRENT (mA) 0.5 10.5 85°C –40°C 10.0 CLASS 0 0 2 4 6 VPORTP VOLTAGE (V) 10 8 0 42691 G01 10 50 20 30 40 VPORTP VOLTAGE (V) (RISING) 9.
PAGE 7
LTC4269-1 TYPICAL PERFORMANCE CHARACTERISTICS VCC(ON) and VCC(OFF) vs Temperature VCC Start-Up Current vs Temperature 16 VCC Current vs Temperature 10 300 VCC(ON) 15 9 250 14 8 IVCC (μA) VCC (V) 12 11 IVCC (mA) 200 13 150 7 6 STATIC PART CURRENT 100 VCC(OFF) 5 10 50 9 8 –50 –25 0 50 75 25 TEMPERATURE (°C) 100 4 0 –50 –25 125 50 25 75 0 TEMPERATURE (°C) 42691 G10 108 100 98 96 94 210 200 195 90 –50 180 –50 –25 125 98 92 0 50 75 25 TEMPERATURE (°C) 42691 G13 100 90 –5
PAGE 8
LTC4269-1 TYPICAL PERFORMANCE CHARACTERISTICS Feedback Ampliﬁer Source and Sink Current vs Temperature 70 70 25°C 10 –10 1050 SINK CURRENT VFB = 1.4V 60 IVCMP (μA) IVCMP (μA) 65 –40°C 30 1100 SOURCE CURRENT VFB = 1.1V 125°C 50 Feedback Ampliﬁer gm vs Temperature gm (μmho) Feedback Ampliﬁer Output Current vs VFB 1000 55 50 –30 950 45 –50 –70 0.9 1 1.1 1.2 VFB (V) 1.3 40 –50 1.5 1.
PAGE 9
LTC4269-1 TYPICAL PERFORMANCE CHARACTERISTICS Minimum PG On-Time vs Temperature 325 300 RtON(MIN) = 158k 330 250 305 200 310 tPGDLY (ns) tON(MIN) (ns) RENDLY = 90k RPGDLY = 27.4k 320 300 290 285 tENDLY (ns) 340 Enable Delay Time vs Temperature PG Delay Time vs Temperature 150 RPGDLY = 16.
PAGE 10
LTC4269-1 PIN FUNCTIONS the VCMP voltage and thus limits peak current until softstart is complete. The ramp time is approximately 70ms per μF of capacitance. Leave SFST open if not using the soft-start function. OSC (Pin 15): Oscillator. This pin, in conjunction with an external capacitor (COSC) to GND, deﬁnes the controller oscillator frequency. The frequency is approximately 100kHz • 100/COSC (pF). FB (Pin 16): Feedback Ampliﬁer Input.
PAGE 11
LTC4269-1 BLOCK DIAGRAM CLASSIFICATION CURRENT LOAD SHDN 1 VPORTP + 1.237V 16k T2P 2 32 25k – RCLASS 3 NC 31 PWRGD 30 CONTROL CIRCUITS PWRGD 4 NC 29 VPORTN 5 14V VNEG VPORTN 6 VNEG BOLD LINE INDICATES HIGH CURRENT PATH 7 NC 27 26 8 NC VCC CLAMPS 20V + + FB 1.3 – 1.237V REFERENCE (VFB) – INTERNAL REGULATOR VCMP + 3V S Q R Q – UVLO + – UVLO 17 COLLAPSE DETECT + 18 16 ERROR AMP CURRENT COMPARATOR IUVLO SFST 1V 14 OVERCURRENT FAULT – – 15.3V 0.
PAGE 12
LTC4269-1 APPLICATIONS INFORMATION OVERVIEW 50 Power over Ethernet (PoE) continues to gain popularity as more products are taking advantage of having DC power and high speed data available from a single RJ45 connector. As PoE continues to grow in the marketplace, Powered Device (PD) equipment vendors are running into the 13.0W power limit established by the IEEE 802.3af standard. VPORTP (V) 40 ON OFF 20 10 CLASSIFICATION DETECTION V2 DETECTION V1 50 VPORTP – VNEG (V) The IEE802.
PAGE 13
LTC4269-1 APPLICATIONS INFORMATION The input diode bridge introduces a voltage drop that affects the range for each mode of operation. The LTC4269-1 compensates for these voltage drops so that a PD built with the LTC4269-1 meets the IEEE 802.3af/IEEE 802.3at-established voltage ranges. Note the Electrical Characteristics are referenced with respect to the LTC4269- 1 package pins. Table 1. LTC4269-1 Modes of Operation as a Function of Input Voltage VPORTP–VPORTN (V) LTC4269-1 MODES OF OPERATION 0V to 1.
PAGE 14
LTC4269-1 APPLICATIONS INFORMATION SIGNATURE CORRUPT OPTION In some designs that include an auxiliary power option, it is necessary to prevent a PD from being detected by a PSE. The LTC4269-1 signature resistance can be corrupted with the SHDN pin (Figure 3). Taking the SHDN pin high will reduce the signature resistor below 11k which is an invalid signature per the IEEE 802.3af/IEEE 802.3at speciﬁcation, and alerts the PSE not to apply power.
PAGE 15
LTC4269-1 APPLICATIONS INFORMATION SIGNATURE CORRUPT DURING MARK 50 VPORTP (V) 40 30 1st CLASS 2nd CLASS ON OFF 20 10 DETECTION V1 DETECTION V2 1st MARK 2nd MARK PD CURRENT INRUSH LOAD, ILOAD 1st CLASS 2nd CLASS 40mA TIME DETECTION V1 DETECTION V2 VPORTP – VNEG (V) 50 40 PD STABILITY DURING CLASSIFICATION 1st MARK 2nd MARK dV = INRUSH dt C1 30 OFF ON OFF 20 T = RLOAD C1 10 TIME VPORTP – T2P (V) –10 –20 –30 TRACKS VPORTN –50 INRUSH = 100mA RCLASS = 30.
PAGE 16
LTC4269-1 APPLICATIONS INFORMATION To control the power-on surge currents in the system, the LTC4269-1 provides a ﬁxed inrush current, allowing C1 to ramp up to the line voltage in a controlled manner. The LTC4269-1 keeps the PD inrush current below the PSE current limit to provide a well controlled power-up characteristic that is independent of the PSE behavior. This ensures a PD using the LTC4269-1 interoperability with any PSE. TURN-ON/ TURN-OFF THRESHOLD The IEEE 802.
PAGE 17
LTC4269-1 APPLICATIONS INFORMATION from commencing operation before the PD interface completely charges the reservoir capacitor, C1. The active low PWRGD pin connects to an internal, opendrain MOSFET referenced to VPORTN and may be used as an indicator bit when power good is declared and active. The PWRGD pin is low impedance with respect to VPORTN. PWRGD PIN WHEN SHDN IS INVOKED In PD applications where an auxiliary power supply invokes the SHDN feature, the PWRGD pin becomes high impedance.
PAGE 18
LTC4269-1 APPLICATIONS INFORMATION Input Diode Bridge Sharing Input Diode Bridges Figure 2 shows how two diode bridges are typically connected in a PD application. One bridge is dedicated to the data pair while the other bridge is dedicated to the spare pair. The LTC4269-1 supports the use of either silicon or Schottky input diode bridges. However, there are trade-offs in the choice of diode bridges.
PAGE 19
LTC4269-1 APPLICATIONS INFORMATION reliably not only when an initially charged cable connects and dissipates the energy through the PD front end, but also when the electrical power system grounds are subject to very high energy events (e.g. lightning strikes). In these high energy events, adding 10Ω series resistance into the VPORTP pin greatly improves the robustness of the LTC4269-1 based PD. (See Figure 7) The TVS limits the voltage across the port while the 10Ω and 0.
PAGE 20
LTC4269-1 APPLICATIONS INFORMATION operating current, the pull-down capability of the T2P pin, and the choice of V+. V+ for example can come from the PoE supply rail (which the LTC4269-1 VPORTP is tied to), or from the voltage source that supplies power to the DC/ DC converter. Option 1 has the advantage of not drawing power unless T2P is declared active. This conﬁguration is an auxiliary-dominant conﬁguration. That is, the auxiliary power source supplies the power even if PoE power is already present.
PAGE 21
LTC4269-1 APPLICATIONS INFORMATION SWITCHING REGULATOR OVERVIEW The LTC4269-1 includes a current mode converter designed speciﬁcally for use in an isolated ﬂyback topology employing synchronous rectiﬁcation. The LTC4269-1 operation is similar to traditional current mode switchers. The major difference is that output voltage feedback is derived via sensing the output voltage through the transformer.
PAGE 22
LTC4269-1 APPLICATIONS INFORMATION T1 VFLBK FLYBACK LTC4269-1 FEEDBACK AMP R1 16 FB – 1V VFB 1.237V R2 • VCMP 17 + CVCMP VIN • PRIMARY SECONDARY + • + COUT ISOLATED OUTPUT MP – COLLAPSE DETECT MS R ENABLE S Q 42691 F10a Figure 10a. LTC4269-1 Switching Regulator Feedback Ampliﬁer PRIMARY-SIDE MOSFET DRAIN VOLTAGE VFLBK 0.8 • VFLBK VIN PG VOLTAGE SG VOLTAGE 42691 F10b tON(MIN) MIN ENABLE ENABLE DELAY PG DELAY FEEDBACK AMPLIFIER ENABLED Figure 10b.
PAGE 23
LTC4269-1 APPLICATIONS INFORMATION Enable Delay Time (ENDLY) Load Compensation Theory The ﬂyback pulse appears when the primary-side switch shuts off. However, it takes a ﬁnite time until the transformer primary-side voltage waveform represents the output voltage. This is partly due to rise time on the primaryside MOSFET drain node, but, more importantly, is due to transformer leakage inductance. The latter causes a voltage spike on the primary side, not directly related to output voltage.
PAGE 24
LTC4269-1 APPLICATIONS INFORMATION in sensed output voltage, compensating for the IR drops.
PAGE 25
LTC4269-1 APPLICATIONS INFORMATION Note the use of the external feedback resistive divider ratio to set output voltage provides the user additional freedom in selecting a suitable transformer turns ratio. Turns ratios that are the simple ratios of small integers; e.g., 1:1, 2:1, 3:2 help facilitate transformer construction and improve performance.
PAGE 26
LTC4269-1 APPLICATIONS INFORMATION A ﬁnal note—the susceptibility of the system to bistable behavior is somewhat a function of the load current/ voltage characteristics. A load with resistive—i.e., I = V/R behavior—is the most apt to be bistable. Capacitive loads that exhibit I = V2/R behavior are less susceptible. Ripple current and percentage ripple is largest at minimum duty cycle; in other words, at the highest input voltage. LP is calculated from the following equation.
PAGE 27
LTC4269-1 APPLICATIONS INFORMATION in an abrupt increase in inductor ripple current and, consequently, output voltage ripple. Do not allow the core to saturate! The maximum peak primary current occurs at minimum VIN: IPK = PIN VIN(MIN) • DCMAX ⎛ X ⎞ • ⎜1+ MIN ⎟ ⎝ 2 ⎠ 1+ XMIN 1 = N • VIN(MIN) VOUT ( VIN(MIN) • DCMAX ) = It is recommended that the Thevenin impedance of the resistive divider (R1||R2) is roughly 3k for bias current cancellation and other reasons. fOSC • LP • PIN 1 = 49.
PAGE 28
LTC4269-1 APPLICATIONS INFORMATION Selecting the Load Compensation Resistor The expression for RCMP was derived in the Operation section as: RCMP = K1• RSENSE • (1−DC) • R1• NSF ESR +RDS(ON) Continuing the example: ⎛ V ⎞ 5 K1= ⎜ OUT ⎟ = = 0.116 ⎝ VIN • Eff ⎠ 48 • 90% DC= 1 1 = = 45.5% 1 48 N•VIN(NOM) • 1+ 1+ 8 5 VOUT If ESR +RDS(ON) = 8mΩ RCMP = 0.116 • 33mΩ • (1− 0.455) 1 • 37.4kΩ • 8mΩ 3 = 3.
PAGE 29
LTC4269-1 APPLICATIONS INFORMATION trace length and area to minimize stray capacitance and potential noise pick-up. You can synchronize the oscillator frequency to an external frequency. This is done with a signal on the SYNC pin. Set the LTC4269-1 frequency 10% slower than the desired external frequency using the OSC pin capacitor, then use a pulse on the SYNC pin of amplitude greater than 2V and with the desired frequency.
PAGE 30
LTC4269-1 APPLICATIONS INFORMATION Primary Gate Delay Time (PGDLY) Switcher’s UVLO Pin Function Primary gate delay is the programmable time from the turn-off of the synchronous MOSFET to the turn-on of the primary-side MOSFET. Correct setting eliminates overlap between the primary-side switch and secondary-side synchronous switch(es) and the subsequent current spike in the transformer. This spike will cause additional component stress and a loss in regulator efﬁciency.
PAGE 31
LTC4269-1 APPLICATIONS INFORMATION If we wanted a VIN-referred trip point of 36V, with 1.8V (5%) of hysteresis (on at 36V, off at 34.2V): RA = 1.8V = 529k, use 523k 3.4μA RB = 523k = 18.5k, use 18.7k ⎛ 36V ⎞ – 1⎟ ⎜ ⎝ 1.23V ⎠ If CTR is undersized, VCC reaches the VCC turn-off threshold before stabilization and the LTC4269-1 turns off. The VCC node then begins to charge back up via RTR to the turn-on threshold, where the part again turns on.
PAGE 32
LTC4269-1 APPLICATIONS INFORMATION The LTC4269-1 has an internal clamp on VCC of approximately 19.5V. This provides some protection for the part in the event that the switcher is off (UVLO low) and the VCC node is pulled high. If RTR is sized correctly, the part should never attain this clamp voltage. Control Loop Compensation Loop frequency compensation is performed by connecting a capacitor network from the output of the feedback ampliﬁer (VCMP pin) to ground as shown in Figure 15.
PAGE 33
LTC4269-1 APPLICATIONS INFORMATION Short-Circuit Conditions Loss of current limit is possible under certain conditions such as an output short-circuit. If the duty cycle exhibited by the minimum on-time is greater than the ratio of secondary winding voltage (referred-to-primary) divided by input voltage, then peak current is not controlled at the nominal value. It ratchets up cycle-by-cycle to some higher level.
PAGE 34
LTC4269-1 APPLICATIONS INFORMATION For each secondary-side power MOSFET, the BVDSS should be greater than: PD(PRI) = IRMS(PRI) 2•RDS(ON) (1+ δ) + BVDSS ≥ VOUT + VIN(MAX) • NSP Choose the primary-side MOSFET RDS(ON) at the nominal gate drive voltage (7.5V). The secondary-side MOSFET gate drive voltage depends on the gate drive method. Primary-side power MOSFET RMS current is given by: Calculate MOSFET power dissipation next.
PAGE 35
LTC4269-1 APPLICATIONS INFORMATION to roughly 7.5V, so you can safely use MOSFETs with maximum VGS of 10V and larger. IRMS(SEC) = IOUT Synchronous Gate Drive Continuing the example: There are several different ways to drive the synchronous gate MOSFET. Full converter isolation requires the synchronous gate drive to be isolated. This is usually accomplished by way of a pulse transformer.
PAGE 36
LTC4269-1 APPLICATIONS INFORMATION The other 1% is due to the bulk C component, so use: COUT ≥ IOUT 1% • VOUT • fOSC In many applications, the output capacitor is created from multiple capacitors to achieve desired voltage ripple, reliability and cost goals. For example, a low ESR ceramic capacitor can minimize the ESR step, while an electrolytic capacitor satisﬁes the required bulk C. Continuing our example, the output capacitor needs: ESRCOUT ≤ 1% • 5V • (1− 49.4%) = 4mΩ 5.3A 5.
PAGE 37
LTC4269-1 APPLICATIONS INFORMATION pin should be separated from other high voltage pins, like VPORTP, VNEG, to avoid the possibility of leakage currents shutting down the LTC4269-1. If not used, tie SHDN to VPORTN. The load capacitor connected between VPORTP and VNEG of the LTC4269-1 can store signiﬁcant energy when fully charged. The design of a PD must ensure that this energy is not inadvertently dissipated in the LTC4269-1.
PAGE 38
54V FROM SPARE PAIR 54V FROM DATA PAIR – 48V AUX IN + B1100 ×8 10k 107k BSS63LT 36V CMDZ 5258B 10k SMAJ58A 10Ω UVLO BAS21 S2B 30.9Ω + T2P 15k 0.1μF 150k OSC R9 20k VCC ENDLY 2.1k RCMP LTC4269-1 22μF 16V 2.2μF 100V SYNC 100k tON TO ISOLATED SIDE VIA OPTO 10μF 100V VNEG PGDLY 20k 1% 330k 1% B1100 RCLASS VPORTN SHDN VPORTP 0.1μF 100V + 4.7μH 33pF FB 680pF SG SENSE– SENSE+ PG 1000pF 100V 10Ω GND VCMP 0.1μF 3.01k 1% 29.4k 1% CCMP 0.
PAGE 39
LTC4269-1 TYPICAL APPLICATIONS PoE-Based 5V, 5A Power Supply 0.18μH T1 t + + – 47μF t VPORTP 5V 5A C1 100μF 10μH 48V AUXILIARY POWER + B1100 × 8 PLCS t 39k 2.2μF 10μF 150Ω 107k 36V PDZ36B 54V FROM DATA PAIR 10k BSS63LT1 22pF + BAS21 1μF 10μF 27.4k 383k 5.1Ω 20Ω FDS8880 S1B S1B 14.0k 1.5nF 3.01k FDS2582 UVLO 10Ω PWRGD FB VCC 2.2nF 2kV PG SENSE+ VPORTP 33mΩ SHDN SMAJ58A 0.1μF 100V 54V FROM SPARE PAIR RCLASS SENSE– LTC4269-1 30.
PAGE 40
LTC4269-1 TYPICAL APPLICATIONS PoE-Based 12V, 2A Power Supply T1 t 0.33μH VPORTP + – + 10μH 48V AUXILIARY POWER + 2.2μF 10μF B1100 × 8 PLCS 36V PDZ36B 10k BSS63LT1 47pF + BAS21 C1 47μF 150Ω 107k 54V FROM DATA PAIR 10μF t t 20k 12V 2A 1μF 22μF 29.4k 383k 15Ω 20Ω FDS3572 S1B S1B 14.0k 470pF 3.01k FDS2582 UVLO 10Ω PWRGD FB 2.2nF 2kV PG VCC SENSE+ VPORTP 33mΩ SHDN RCLASS SMAJ58A 30.9Ω 54V FROM SPARE PAIR 0.
PAGE 41
LTC4269-1 TYPICAL APPLICATIONS PoE-Based 3.3V, 7A Power Supply 0.18μH T1 t + + – 47μF t VPORTP 3.3V 7A C1 100μF 10μH 48V AUXILIARY POWER + B1100 × 8 PLCS t 20k 2.2μF 10μF 150Ω 107k 36V PDZ36B 54V FROM DATA PAIR 10k BSS63LT1 22pF + BAS21 1μF 22μF B0540W 29.4k 383k 5.1Ω 20Ω FDS8670 S1B S1B 14.0k 2.2nF 3.01k FDS2582 UVLO 10Ω PWRGD FB VCC SENSE+ VPORTP 33mΩ SHDN SMAJ58A 54V FROM SPARE PAIR 0.1μF 100V 47Ω 2.2nF 2kV PG RCLASS SENSE– LTC4269-1 30.
PAGE 42
LTC4269-1 PACKAGE DESCRIPTION DKD Package 32-Lead Plastic DFN (7mm × 4mm) (Reference LTC DWG # 05-08-1734 Rev A) 0.70 ±0.05 4.50 ±0.05 6.43 ±0.05 2.65 ±0.05 3.10 ±0.05 PACKAGE OUTLINE 0.20 ±0.05 0.40 BSC 6.00 REF RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 7.00 ±0.10 17 R = 0.115 TYP 32 R = 0.05 TYP 0.40 ±0.10 6.43 ±0.10 4.00 ±0.10 2.65 ±0.10 PIN 1 NOTCH R = 0.30 TYP OR 0.35 = 45° CHAMFER PIN 1 TOP MARK (SEE NOTE 6) 16 0.75 ±0.05 0.40 BSC 1 6.
PAGE 43
LTC4269-1 REVISION HISTORY (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 04/10 Connected PWRGD Pin to UVLO Pin in Typical Application Circuit Drawings Added Text Clarifying Connecting PWRGD Pin to UVLO Pin in Complementary Power Good Section of the Applications Information Section C 08/12 Updated maximum power levels for class 0 and class 3 to 13.
PAGE 44
LTC4269-1 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC4257-1 IEEE 802.3af PD Interface Controller 100V 400mA Internal Switch, Programmable Classiﬁcation, Dual Current Limit LTC4258 Quad IEEE 802.3af Power over Ethernet Controller DC Disconnect Only, IEEE-Compliant PD Detection and Classiﬁcation, Autonomous Operation or I2C Control LTC4259A-1 Quad IEEE 802.