Datasheet

7
1605fc
LTC1605
PIN FUNCTIONS
UUU
on Pin 15 and bit 8 is output on Pin 22. Bit 7 is output on
Pin 6 and the LSB is output on Pin 13.
R/C (Pin 24): Read/Convert Input. With CS low, a falling
edge on R/C puts the internal sample-and-hold into the
hold state and starts a conversion. With CS low, a rising
edge on R/C enables the output data bits.
CS (Pin 25): Chip Select. Internally OR’d with R/C. With
R/C low, a falling edge on CS will initiate a conversion.
With R/C high, a falling edge on CS will enable the output
data.
BUSY (Pin 26): Output Shows Converter Status. It is low
when a conversion is in progress. Data valid on the rising
edge of BUSY. CS or R/C must be high when BUSY rises
or another conversion will start without time for signal
acquisition.
V
ANA
(Pin 27): 5V Analog Supply. Bypass to ground with
a 0.1µF ceramic and a 10µF tantalum capacitor.
V
DIG
(Pin 28): 5V Digital Supply. Connect directly to Pin
27.
TEST CIRCUITS
Load Circuit for Access Timing
1k C
L
C
L
DBN DBN
1k
5V
LTC1605 • TC01
A. HI-Z TO V
OH
AND V
OL
TO V
OH
B. HI-Z TO V
OL
AND V
OH
TO V
OL
Load Circuit for Output Float Delay
1k 50pF 50pF
DBN
DBN
1k
5V
LTC1605 • TC02
A. V
OH
TO HI-Z B. V
OL
TO HI-Z
FUNCTIONAL BLOCK DIAGRA
UU
W
16-BIT CAPACITIVE DAC
COMPREF BUF
2.5V REF
CAP
(2.5V)
C
SAMPLE
C
SAMPLE
•
•
•
D15
D0
BUSY
CONTROL LOGIC
R/C BYTE
INTERNAL
CLOCK
CS
ZEROING SWITCHES
V
DIG
V
ANA
V
IN
REF
AGND1
AGND2
DGND
16
LTC1605 • BD
+
–
SUCCESSIVE APPROXIMATION
REGISTER
OUTPUT LATCHES
4k
20k
4k10k