Datasheet

LTC3534
14
3534fb
For more information www.linear.com/LTC3534
applicaTions inForMaTion
f
FILTER _ ZERO
=
1
2• π •R
ESR
•C
OUT
Hz
where R
ESR
is the equivalent series resistance of the
output capacitor.
A troublesome feature in boost mode is the right-half plane
zero (RHP), given by:
f
RHPZ
=
V
IN
2
2• π •I
OUT
•L1• V
OUT
Hz
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorporated
to stabilize the loop, but at a cost of reduced bandwidth and
slower transient response. To ensure proper phase margin
using Type I compensation, the loop must be crossed over
a decade before the LC double pole. Referring to Figure
5, the unity-gain frequency of the error amplifier utilizing
Type I compensation is given by:
f
UG
=
1
2• π •R1•C
P1
Hz
Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a higher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
the output filter. Referring to Figure 6, the location of the
poles and zeros are given by:
f
POLE1
≅
1
2• π •5×10
3
•R1•C
P1
Hz
(which is extremely close to DC)
f
ZERO1
=
1
2• π •R
Z
•C
P1
Hz
f
ZERO2
=
1
2• π •R1•C
Z1
Hz
f
POLE2
=
1
2• π •R
Z
•C
P2
Hz
where resistance is in Ohms and capacitance is in Farads.
1V
R1
R2
3534 F05
FB
15
11
V
C
C
P1
V
OUT
14
–
+
ERROR
AMP
1V
R1
R2
3534 F06
FB
15
11
V
C
C
P1
R
Z
V
OUT
14
C
P2
C
Z1
–
+
ERROR
AMP
Figure 5. Error Amplifier with Type I Compensation Figure 6. Error Amplifier with Type III Compensation