Datasheet

LTC4357
9
4357fd
Layout Considerations
Connect the IN and OUT pins as close as possible to the
MOSFET’s source and drain pins. Keep the traces to the
MOSFET wide and short to minimize resistive losses. See
Figure 5.
applications inForMation
Figure 5. Layout Considerations
For the DFN package, pin spacing may be a concern at
voltages greater than 30V. Check creepage and clearance
guidelines to determine if this is an issue. To increase the
pin spacing between high voltage and ground pins, leave
the exposed pad connection open. Use no-clean solder
to minimize PCB contamination.
LTC4357
S
S
S
G
1
2
3
4
8
7
6
5
D
D
D
D
MOSFET
IN
GATE
OUT
V
IN
V
OUT
4357 F05
S
S
S
G
1
2
3
4
8
7
6
5
D
D
D
D
V
IN
OUTGATE
IN
4
5
7
6
3
2
1
V
OUT