Datasheet

LTC2753
6
2753f
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
DD
= 2.7V to 3.3V
t
22
READ Falling Edge to UPD Rising Edge (Note 10)
●
10 ns
t
23
I/O Bus Hi-Z to Read Rising Edge (Note 10)
●
0ns
t
24
Read Falling Edge to I/O Bus Active (Note 10)
●
35 ns
CLR Timing
t
25
CLR Pulse Width Low
●
20 ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Continuous operation above the specifi ed maximum operating
junction temperature may impair device reliability.
Note 3: Because of the proprietary SoftSpan switching architecture, the
measured resistance looking into each of the specifi ed pins is constant for
all output ranges if the I
OUT1X
and I
OUT2X
pins are held at ground.
Note 4: R1 is measured from R
IN
to R
COM
; R2 is measured from REFA to
R
COM
.
Note 5: Using LT1469 with C
FEEDBACK
= 15pF. A ±0.0015% settling time
of 1.7s can be achieved by optimizing the time constant on an individual
basis. See Application Note 74, Component and Measurement Advances
Ensure 16-Bit DAC Settling Time.
Note 6: Measured at the major carry transition, 0V to 5V range. Output
amplifi er: LT1469; C
FB
= 27pF.
Note 7. Full-scale transition; REF = 0V.
Note 8. REF = 6V
RMS
at 1kHz. 0V to 5V range. DAC code = FS. Output
amplifi er = LT1469.
Note 9. Calculation from V
n
= √
⎯
4
⎯
k
⎯
T
⎯
R
⎯⎯⎯
B, where k = 1.38E-23 J/°K
(Boltzmann constant), R = resistance (), T = temperature (°K), and B =
bandwidth (Hz).
Note 10. Guaranteed by design. Not production tested.
TIMING CHARACTERISTICS
The ● denotes specifi cations that apply over the full operating temperature range,
otherwise specifi cations are at T
A
= 25°C.