Datasheet

LTC2753
16
2753f
System Offset Adjustment
Many systems require compensation for overall system
offset. The R
VOSA
and R
VOSB
offset adjustment pins are
provided for this purpose. For noise immunity and ease
of adjustment, the control voltage is attenuated to the
DAC output:
V
OS
= –0.01 • V(R
VOSX
) [0V to 5V, ±2.5V spans]
V
OS
= –0.02 • V(R
VOSX
) [0V to 10V, ±5V, –2.5V to 7.5V
spans]
V
OS
= –0.04 • V(R
VOSX
) [±10V span]
The nominal input range of this pin is ±5V; other reference
voltages of up to 15V may be used if needed. The R
VOSX
pins have an input impedance of 1M. To preserve the
settling performance of the LTC2753, drive this pin with a
Thevenin-equivalent impedance of 10k or less. Short any
unused system offset adjustment pins to I
OUT2
.
Table 2. Span Codes
S2 S1 S0 SPAN
0 0 0 Unipolar 0V to 5V
0 0 1 Unipolar 0V to 10V
0 1 0 Bipolar –5V to 5V
0 1 1 Bipolar –10V to 10V
1 0 0 Bipolar –2.5V to 2.5V
1 0 1 Bipolar –2.5V to 7.5V
Codes not shown are reserved and should not be used.
Table 3. Address Codes
DAC CHANNEL A1 A0
A00
B01
ALL* 1 1
Codes not shown are reserved and should not be used.
*If readback is taken using the All DACs address, the LTC2753 defaults to
DAC A.
OPERATION