Datasheet
Table Of Contents
- Features
- Applications
- Description
- Typical Application
- Absolute Maximum Ratings
- Pin Configuration
- Order Information
- Electrical Characteristics
- Timing Characteristics
- Typical Performance Characteristics
- Pin Functions
- Block Diagram
- Timing Diagrams
- Operation
- Operation-Examples
- Applications Information
- Typical Applications
- Package Description
- Revision History
- Typical Application
- Related Parts
LTC2751
15
2751fa
operaTion—exaMples
WR
2751 TD03
SPAN I/O
INPUT
DATA I/O
INPUT
UPD
D/S
8000
H
010
READ = LOW
UPDATE
(5V RANGE, V
OUT
= 0V)
WR
2751 TD04
SPAN I/O
INPUT
DATA I/O
INPUT
READ = LOW
UPD
D/S
C000
H
4000
H
011
UPDATE (5V)
UPDATE (–5V)
WR
2751 TD05
DATA I/O
OUTPUT
DATA I/O
INPUT
READ
UPD
D/S
8000
H
8000
H
0000
H
HI-Z
INPUT REGISTER DAC REGISTER
HI-Z
UPDATE (2.5V)
1. Load ±5V range with the output at 0V. Note that since span and code are updated together, the output, if started at
0V, will stay there.
2. Load ±10V range with the output at 5V, changing to –5V.
3. Write and update mid-scale code in 0V to 5V range (V
OUT
= 2.5V) using readback to check the contents of the input
and DAC registers before updating.