Datasheet

LTM4602HV
17
4602hvf
APPLICATIO S I FOR ATIO
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Figure 20. Recommended PCB Layout
current into an on board 10pF capacitor that establishes
a ramp that is compared to a voltage threshold that is
equal to the output voltage up to a 2.4V clamp. This I
ON
current is equal to: I
ON
= (V
IN
– 0.7V)/110k, with the 110k
onboard resistor from V
IN
to f
ADJ
. The on time is equal to
t
ON
= (V
OUT
/I
ON
) • 10pF and t
OFF
= t
s
– t
ON
. The frequency
is equal to: Freq. = DC/t
ON
. The I
ON
current is proportional
to V
IN
, and the regulator duty cycle is inversely propor-
tional to V
IN
, therefore the step-down regulator will remain
relatively constant frequency as the duty cycle adjustment
takes place with lowering V
IN
. The on time is proportional
to V
OUT
up to a 2.4V clamp. This will hold frequency rela-
tively constant with different output voltages up to 2.4V.
The regulator switching period is comprised of the on
time and off time as depicted in Figure 21. The on time is
equal to t
ON
= (V
OUT
/I
ON
) • 10pF and t
OFF
= t
s
– t
ON
. The
frequency is equal to: Frequency = DC/t
ON
).
V
IN
PGND
TOP LAYER
V
OUT
4602HV F20
LOAD
C
IN
t
OFF
PERIOD t
s
t
ON
4602HV F21
(DC) DUTY CYCLE =
t
ON
t
s
DC = =
t
ON
t
s
FREQ =
DC
t
ON
V
OUT
V
IN
Figure 21
The LTM4602 has a minimum (t
ON
) on time of 100 nanosec-
onds and a minimum (t
OFF
) off time of 400 nanoseconds.
The 2.4V clamp on the ramp threshold as a function of
V
OUT
will cause the switching frequency to increase by the
ratio of V
OUT
/2.4V for 3.3V and 5V outputs. This is due to
the fact the on time will not increase as V
OUT
increases
past 2.4V. Therefore, if the nominal switching frequency
is 850kHz, then the switching frequency will increase
to ~1.2MHz for 3.3V, and ~1.7MHz for 5V outputs due
to Frequency = (DC/t
ON
) When the switching frequency
increases to 1.2MHz, then the time period ts is reduced
to ~833 nanoseconds and at 1.7MHz the switching period
reduces to ~588 nanoseconds. When higher duty cycle
conversions like 5V to 3.3V and 12V to 5V need to be
accommodated, then the switching frequency can be
lowered to alleviate the violation of the 400ns minimum
off time. Since the total switching period is t = t
ON
+ t
OFF
,
t
OFF
will be below the 400ns minimum off time. A resistor
from the f
ADJ
pin to ground can shunt current away from
the on time generator, thus allowing for a longer on time
and a lower switching frequency. 12V to 5V and 5V to
3.3V derivations are explained in the data sheet to lower
switching frequency and accommodate these step-down
conversions.
Equations for setting frequency: V
OUT
= 5V
I
ON
= (V
IN
– 0.7V)/110k; for 12V input, I
ON
= 103µA
frequency = (I
ON
/[2.4V • 10pF]) • (DC) = 1.79MHz;
DC = duty cycle, duty cycle is (V
OUT
/V
IN
)
t = t
ON
+ t
OFF
, t
ON
= on-time, t
OFF
= off-time of the
switching period; t = 1/frequency
t
OFF
must be greater than 400ns, or t – t
ON
> 400ns.
t
ON
= DC • t
1MHz frequency or 1µs period is chosen.
t
ON
= 0.41 • 1µs ≅ 410ns
t
OFF
= 1µs – 410ns ≅ 590ns
t
ON
and t
OFF
are above the minimums with adequate guard
band.