Datasheet

LTC1403/LTC1403A
8
1403fb
TIMING DIAGRAM
LTC1403 Timing Diagram
SCK
CONV
INTERNAL
S/H STATUS
SDO
t
7
t
3
t
1
11716 2 3 4 5 6 7 8 9 10 11 12 13
14
15 16 17 18
t
2
t
6
t
8
t
10
t
4
t
5
t
8
t
9
t
ACQ
SAMPLE HOLD HOLD
Hi-Z
Hi-Z
t
CONV
14-BIT DATA WORD
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
*BITS MARKED "X" AFTER D0 SHOULD BE IGNORED.
t
THROUGHPUT
1403A TD01
D11 D10 D8 D7 D6 D5 D4 D3 D2 D1 D0 X XD9
SAMPLE
1
LTC1403A Timing Diagram
SCK
CONV
INTERNAL
S/H STATUS
SDO
t
7
t
3
t
1
11716 2 3 4 5 6 7 8 9 10 11 12 13
14
15 16 17 18
t
2
t
6
t
8
t
10
t
4
t
5
t
8
t
9
t
ACQ
SAMPLE HOLD HOLD
Hi-Z
Hi-Z
t
CONV
14-BIT DATA WORD
SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
t
THROUGHPUT
1403A TD01b
D13 D12 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0D11
SAMPLE
1
Nap Mode and Sleep Mode Waveforms
SLK
CONV
NAP
SLEEP
V
REF
t
1
t
12
t
1
NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS
1403A TD02
SCK to SDO Delay
t
8
t
10
SCK
SDO
1403A TD03
V
IH
V
OH
V
OL
t
9
SCK
SDO
V
IH
90%
10%